- 1 Problem with syscon pinout numeration in wiki in the SWX-xxx series (128 pins package)
- 2 PowerON/off HDMI/CEC, WiFi, Bluetooth, GbLAN, buttons etc
- 3 Multipage Correction
- 4 COK-002 with 0DBF syscon
- 5 SHA1 hashes stored at eeprom
- 6 PS2 Mechacon vs PS3 Syscon vs PS4 Syscon
Problem with syscon pinout numeration in wiki in the SWX-xxx series (128 pins package)
In all the SWX-xxx series pages the pinout is numered starting with the pin1 at bottom-left corner (when viewing the syscon in the same orientation than the printed texts) this way:
- """pin 1 left bottom at mark, counter clockwise from south (pins 1-38) to east (pins 39-64), north (pins 65-102), west (103-128))"""
In the first SW series is barelly visible (in the photos it looks is not marked) but in newer series is more visible, and is located at bottom-rigth corner, see this photos i marked: http://666kb.com/i/cnj3qic8k412x3p8r.jpg
- All photos are taken from wiki visibles in his respective pages... look for the original photo to see it in better resolution (when posible because there are not much photos of syscons in wiki or internet)
If this is correct, is needed to change the info about the pinout in all the affected pinout tables (in all SWX-xxx pages)
There is no seperate communication processor on the PS3. Powering is handled by syscon.
- Power and eject buttons/switchs are connected with syscon (indirectly), there is no protocol involved, the syscon pins related with this buttons has 2 posible states: 3.3v (when button is not pressed)... or 0v (when button is pressed)
<TizzyT> eussnl my syscon is CXR714120-301GB its different form what the wiki says CECHH / DIA-001
ball count: 4x16 + 8x14 + 2x12 = 64+112+24 = 200 pads
new QF package is 26 * 38 = 128 pins
T4 XTAL / T5 EXTAL goes to [X4001] of 16.9344 MHz C16 OSCIN / B16 OSCOUT goes to [X4002] of 32.768 kHz
Backup Mode / Diag
BACKUP_MODE / DIAG_MODE pins on Gen 2 might be pins 110 and 111. They are pulled low. Not completely sure, but looking at those pins in relation to what's around them seems like it could be those two.
Pink is N15 BACKUP_MODE Blue is N16 DIAG_MODE
According to schematics, DIAG and BACKUP_MODE are are shown in the following picture for COK-001 and COK-002 Motherboards - http://goput.it/69k.jpg These pins are tied to 3.3v so grounding them should enable each mode respectively. !unverified!
Note: moved from seperate page, as there are already over 8 different syscon pages and the very same info is mention in depth on the SC firmware and SC hardware page (and in 150 wiki edits on the sysinfo page :/) we dont have a sperate page for every SELF flag either ;) (although there are >4 pages describing SELF :/)
a SoftID is just a 0x4 code that tells you the hardware revision of the syscon.
This info can be get through the More System Information method.
You can find them also inside the SYS_CON_FIRMWARE_*********.pkg (Syscon_Firmware) at the offset 0x28E (In this link you can found the list of the Syscon update packages)
every SoftID is associated with the ps3 mainboard. this means that you can know if a SC is compatible with your board without opening a PS3 ( Syscon Hardware)
Datasheet of SoC similar to syscon
COK-002 with 0DBF syscon
-This breaks lot of standards/pages/tables in wiki, can you add some notes please ?. E.g: the board came from official repair service, bought in a normal shop, or is a frankenstein made at home ?, it boots correctly and allows firmware updates ?. If it works normally i think this proves CXR713120-20xGB and CXR714120-30xGB shares the same pinout, but the fact that is using 0DBF SoftID is a bit shocking (maybe because is the minimal SoftID allowed by CXR714120-30xGB ?... check SoftID examples in this table) --Sandungas 22:07, 24 July 2013 (MSK)
-The console is a CECHE01 MG (Metal Gear Solid 4 edition) and came with a 3rd generation BD drive (the first type with 2 lens). It had never been to SONY for service. It works normally, correctly and as you could see, has a minimum version which is compatible with the motherboard type. --l_oliveira
SHA1 hashes stored at eeprom
"Files finally stored into the FLASH regions have their associated SHA-1 hash value stored in the SYSCON EEPROM for authentication and verification purposes. "
What happens if we change those hashes to something a 3.55 ofw would have? (assuming we were doing this experiment on a hackable console?)
PS2 Mechacon vs PS3 Syscon vs PS4 Syscon
|Production Start Date (<=)||PS2 Mechacon||PS3 Syscon||PS4 Syscon||Real IC/CPU Core|
|10/1999||CXP101064||-||-||Sony SPC970 (100 pin)|
|??/2001||CXP103049||-||-||Sony SPC? (136 pin)|
|01/2004||CXR706080||?||-|| Sony SR11|
PS2 (Dragon): 164 pin
PS3: 200 pin
78K0R/KxX derivate (128 pin)
- The SPC900 core was designed by Texas Instruments []
- CXP101064, CXP102064 are similar to CXP97 (CXP971000, CXP972032, CXP973064, CXP973F064)
- In-Circuit-Emulator: Mitek NICE-SPC970 []; Debug software: SVD970; Flash programmer: Sony SFP-2
- A F inside the model name specifies if the IC contains flash memory. Sony does omit this label on retail PS3 Syscons - it's not known whether this also applies to the PS2 Mechacon.
- CXR7 series uses Sony SR11 CPU (ARM7TDMI)
- Models with public datasheet: CXR702080, CXR702F080, CXR704060
- Likely based on the Texas Instruments TMS470R1 series (derived from TMS470R1B512 ?)
- Prototype PS3 Syscon's: