GbLAN: Difference between revisions

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[[Category:Hardware]]
= Gigabit LAN =
= Gigabit LAN =


Line 10: Line 9:
! Ports !! Size !! Speed !! Voltage !! Packaging !! Manufacturer !! Serial Number !! Description
! Ports !! Size !! Speed !! Voltage !! Packaging !! Manufacturer !! Serial Number !! Description
|-
|-
| 8 (3 used) || 20x20mm || Xtal X3501: 25MHz || 3.3V/1.9V/1.2V || 144-pin TQFP || Marvell || 88E6108-LAR1 || Used in earlier models
| 8 (3 used) || 20x20mm || Xtal X3501: 25MHz || 3.3V/1.9V/1.2V || 144-pin TQFP || Marvell Alaska || [[88E6108-LAR1]] || Used in earlier models (up to [[CECHGxx]]/[[SEM-00x|SEM-001]])
|-
|-
| - || - || - || - || 64-pin QFN || Marvell || Alaska 88E1118R-NNC2 || Used in Slim models
| ? || ? || ? || ? || ? || Marvell Alaska || [[88E6106-LKJ1]] || Used in later models ([[CECHHxx]]/[[DIA-00x|DIA-001]])
|-
|-
|}
| ? || ? || ? || ? || ? || ? || ? || DIA-002 (CECHJxx, CECHKxx)
:
 
 
=== Marvell 88E6108-LAR1 ===
 
<div style="float:right">[[File:Marvell 88E6108-LAR1.JPG|200px|thumb|left|144-TQFP<br />Marvell 88E6108-LAR1]]</div>
 
Datasheet: (not available)
 
<pre>productcode meaning:
88E6108-LAR1
 
Type: Ethernet
Speed : 1Gbps
Ports : 8
Package : 144-TQFP
 
(sorry, no explaination yet)</pre>
 
The Marvell 88E6108-LAR1 is sort of a switching hub chip, with several ports that can be used in different configurations:
<pre>Port 0 (usuable as MDI 4 dif.pair) : unused (tied to ground)
Port 1 (usuable as MDI 4 dif.pair) : unused (tied to ground)
Port 2 (usuable as MDI 4 dif.pair) : wired to external UTP connector
Port 3 (GMII): Wired to SB
Port 4 (usable as TX/RX dif.pair)(100FX): wired to Wifi
Port 5 (usable as TX/RX dif.pair): unused (tied to ground)
Port 6 (usable as TX/RX dif.pair): unused (tied to ground)
Port 7 (usable as TX/RX dif.pair): unused (tied to ground)</pre>
 
==== Pinout IC3503====
Productcode: 88E6108-B2-LAR1C000-P123 | PartNo.: 6-710-202-01
<div style="height:400px; overflow:auto">
{| border="1" cellspacing="0" cellpadding="5" border="#999" class="wikitable" style="border:1px solid #999; border-collapse: collapse;"
|- bgcolor="#cccccc"
! Pin # !! Name !! Port !! Description
|-
| 1 || RST || rowspan="36" | Power / Led / Xtal etc || -
|-
| 2 || AVDD || -
|-
| 3 || NC || No Connection
|-
| 4 || NC || No Connection
|-
| 5 || NC || No Connection
|-
| 6 || AVDD || -
|-
| 7 || XTAL_IN || -
|-
| 8 || XTAL_OUT || -
|-
| 9 || VDD_CORE || -
|-
| 10 || NC || No Connection
|-
| 11 || NC || No Connection
|-
| 12 || AVDD || -
|-
| 13 || NC || No Connection
|-
| 14 || NC || No Connection
|-
| 15 || P0_LED3 || -
|-
| 16 || P0_LED2 || -
|-
| 17 || VDD_CORE || -
|-
| 18 || P0_LED1 || -
|-
| 19 || P0_LED0 || -
|-
| 20 || VDDO_LED || -
|-
| 21 || P1_LED3 || -
|-
| 22 || VDD_CORE || -
|-
| 23 || P1_LED3 || -
|-
| 24 || P1_LED1 || -
|-
| 25 || P1_LED0 || -
|-
| 26 || VDDO_LED || -
|-
| 27 || P2_LED3 || -
|-
| 28 || P2_LED2 || -
|-
| 29 || P2_LED1 || -
|-
| 30 || P2_LED0 || -
|-
| 31 || VDD_CORE || -
|-
| 32 || MDC_PHY/PPU_EN || -
|-
| 33 || VDDO_SMI_PHY || -
|-
|-
| 34 || MDIO_PHY || -
| ? || ? || ? || ? || ? || ? || ? || VER-001 (CECHLxx, CECHMxx, CECHPxx, CECHQxx)
|-
|-
| 35 || VDD_PLL || -
| - || - || 125MHz || 3.3V, 2.5V or 1.8V || 64-pin QFN || Marvell Alaska || [[88E1118R-NNC2]] || Used in Slim models ([[CECH-20xx]]/[[DYN-00x]] and [[CECH-21xx]]/[[SUR-00x|SUR-001]])
|-
|-
| 36 || VDD_CORE || -
| - || 6,5x6,5mm || - || - || 48-pin || Marvell Alaska || [[88E1310-NNB2]] || Used in Slim models ([[CECH-25xx]]/[[JTP-00x|JTP-001]]/[[JSD-00x|JSD-001]], [[CECH-30xx]]/[[KTE-00x|KTE-001]])
|-
|-
| 37 || P7_TXP || rowspan="5" | Port 7<br />(unused) || -
| ? || ? || ? || ? || ? || ? || ? || superslims ?
|-
| 38 || P7_TXN || -
|-
| 39 || P7_VDDAH || Ground
|-
| 40 || P7_RXP || -
|-
| 41 || P7_RXN || -
|-
| 42 || VSS || || Ground
|-
| 43 || P6_RXP || rowspan="5" | Port 6<br />(unused) || -
|-
| 44 || P6_RXN || -
|-
| 45 || P6_VDDAH || Ground
|-
| 46 || P6_TXN || -
|-
| 47 || P6_TXP || -
|-
| 48 || VDD_CORE || || -
|-
| 49 || P5_TXP || rowspan="5" | Port 5<br />(unused) || -
|-
| 50 || P5_TXN || -
|-
| 51 || P5_VDDAH || Ground
|-
| 52 || P5_RXP || -
|-
| 53 || P5_RXN || -
|-
| 54 || VSS || || Ground
|-
| 55 || P4_RXN || rowspan="5" | Port 4 (100FX) || -
|-
| 56 || P4_RXP || -
|-
| 57 || P4_VDDAH || -
|-
| 58 || P4_TXN || -
|-
| 59 || P4_TXP || -
|-
| 60 || VDD_CORE || || -
|-
| 61 || VDD_P3 || rowspan="46" | Port 3 (GMII) || -
|-
| 62 || P3_CLK125N || -
|-
| 63 || P3_TXEN/HALFDPX || -
|-
| 64 || P3_TXD7/MODE2 || -
|-
| 65 || P3_TXD6/MODE1 || -
|-
| 66 || VDD_CORE || -
|-
| 67 || P3_TXD5/MODE0 || -
|-
| 68 || P3_TXD4/ADDR4 || -
|-
| 69 || VDD0_P3 || -
|-
| 70 || P3_TXD3/ADDR3 || -
|-
| 71 || P3_TXD2/ADDR2 || -
|-
| 72 || P3_TXD1/ADDR1 || -
|-
| 73 || P3_TXD0/ADDR0 || -
|-
| 74 || P3_TXCLK || -
|-
| 75 || P3_GTXCLK || -
|-
| 76 || VDD0_P3 || -
|-
| 77 || P3_RXDV || -
|-
| 78 || VDD_CORE || -
|-
| 79 || P3_RXXEA || -
|-
| 80 || P3_RXD7 || -
|-
| 81 || P3_RXD6 || -
|-
| 82 || P3_RXD5 || -
|-
| 83 || P3_RXD4 || -
|-
| 84 || VDD_CORE || -
|-
| 85 || P3_RXD3 || -
|-
| 86 || VDDO_P3 || -
|-
| 87 || P3_RXD2 || -
|-
| 88 || P3_RXD1 || -
|-
| 89 || P3_RXD0 || -
|-
| 90 || P3_RXCLK || -
|-
| 91 || VDD_CORE || -
|-
| 92 || P3_CRS || -
|-
| 93 || P3_COL || -
|-
| 94 || P3_ENABLE_PD || -
|-
| 95 || INTn || -
|-
| 96 || MDIO_CPU || -
|-
| 97 || MDC_CPU || -
|-
| 98 || VDD_CORE || -
|-
| 99 || EE_DOUT || -
|-
| 100 || VDDO_SMI_CPU || -
|-
| 101 || EE_DIN/HD_FLOW_DIS || -
|-
| 102 || EE_CLK/FD_FLOW_DIS || -
|-
| 103 || EE_CS/EE_1K || -
|-
| 104 || VDD_CORE || -
|-
| 105 || SW_MODE0 PU || -
|-
| 106 || SW_MODE1 PU || -
|-
| 107 || VSS ||  || Ground
|-
| 108 || RESETn ||  || -
|-
| 109 || VSS || rowspan="12" | Port 2 (MDI) || Ground
|-
| 110 || P2_MDIN3 || -
|-
| 111 || P2_MDIP3 || -
|-
| 112 || P2_AVDD || -
|-
| 113 || P2_MDIN2 || -
|-
| 114 || P2_MDIP2 || -
|-
| 115 || P2_MDIN1 || -
|-
| 116 || P2_MDIP1 || -
|-
| 117 || P2_AVDD || -
|-
| 118 || P2_AVDD || -
|-
| 119 || P2_MDIN0 || -
|-
| 120 || P2_MDIP0 || -
|-
| 121 || VSS || rowspan="12" | Port 1 (MDI) || Ground
|-
| 122 || P1_MDIN3 || -
|-
| 123 || P1_MDIP3 || -
|-
| 124 || P1_AVDD || -
|-
| 125 || P1_MDIN2 || -
|-
| 126 || P1_MDIP2 || -
|-
| 127 || P1_MDIN1 || -
|-
| 128 || P1_MDIP1 || -
|-
| 129 || P1_AVDD || -
|-
| 130 || P1_AVDD || -
|-
| 131 || P1_MDIN0 || -
|-
| 132 || P1_MDIP0 || -
|-
| 133 || VSS || rowspan="12" | Port 0 (MDI) || Ground
|-
| 134 || P0_MDIN3 || -
|-
| 135 || P0_MDIP3 || -
|-
| 136 || P0_AVDD || -
|-
| 137 || P0_MDIN2 || -
|-
| 138 || P0_MDIP2 || -
|-
| 139 || P0_MDIN1 || -
|-
| 140 || P0_MDIP1 || -
|-
| 141 || P0_AVDD || -
|-
| 142 || P0_AVDD || -
|-
| 143 || P0_MDIN0 || -
|-
| 144 || P1_MDIP0 || -
|-
|-
|}
|}
</div>
:


== Jumbo frames ==
From Linux perspective (under OtherOS &lt;=3.15), the old drivers set the [http://git.kernel.org/?p=linux/kernel/git/next/linux-next.git;a=blob;f=drivers/net/ps3_gelic_net.h;h=5e1c28654e16146918a70e2efbbd3da4619a939f;hb=02c1889166b47b9ade309a8f4b7c4ddf0489d869#l44 MTU to 2308], while newer versions set the [http://git.kernel.org/?p=linux/kernel/git/next/linux-next.git;a=blob;f=drivers/net/ps3_gelic_net.h;h=d9a55b93898b24f2b67a6f54accc5ee064d79bbb;hb=HEAD#l35 MTU of 1518]. This could be a hypervisor restriction (needs research).


==== Pinout CN3501 ====
MTU is set with vsh using syscall net_ioctl (libnet)
Connectortype: RJ45 modular jack with LED | PartNo.: 1-820-763-12
{| border="1" cellspacing="0" cellpadding="5" border="#999" class="wikitable" style="border:1px solid #999; border-collapse: collapse;"
|- bgcolor="#cccccc"
! Pin # !! Name !! Description
|-
| 1 || VCC || -
|-
| 2 || TP1+ || -
|-
| 3 || TP1- || -
|-
| 4 || TP2+ || -
|-
| 5 || TP2- || -
|-
| 6 || GND || -
|-
| 7 || TP3+ || -
|-
| 8 || TP3- || -
|-
| 9 || TP4+ || -
|-
| 10 || TP4- || -
|-
| 11 || VCC || -
|-
|}
 
=== Marvell Alaska 88E1118R-NNC2 ===
 
<div style="float:right">[[File:64-pin-QFN-Marvel-Alaska-88E1118R.PNG|200px|thumb|left|64-pin QFN<br />Marvel Alaska 88E1118R]]</div>
 
[http://www.marvell.com/transceivers/assets/88E1118R_Technical_Product_Brief.pdf Product Brief]
 
<pre>productcode meaning:
88E1118R-NNC2 = 10/100/1000BASE-T PHY with RGMII


Type: Ethernet
On 3.41 firmware, with a [https://gist.github.com/jevinskie/945199a90858319642ded49df632554e modified ps3_gelic driver], frames of 1624 bytes can be sent and frames of 1628 bytes can be received.
Speed : 1Gbps
VCC: 1.8V (regulators can be supplied with 1.8V, 2.5V or 3.3V)
I/O: 1.8V, 2.5V or 3.3V
125MHz Clock input
Package : 64-pin QFN


(sorry, no explaination yet)</pre>
=== Efficiency ===
 
{| class="wikitable" style="text-align:center;"
 
! Frame type !! colspan=2 | Layer 1 overhead !! colspan=2 | Layer 2 overhead !! MTU !! Layer 3 overhead !! Layer 4 overhead !! Payload size !! Total transmitted !! Efficiency
==== pinout ====  
 
(nothing here, please help fill this in)
<div style="height:400px; overflow:auto">
{| border="1" cellspacing="0" cellpadding="5" border="#999" class="wikitable" style="border:1px solid #999; border-collapse: collapse;"  
|- bgcolor="#cccccc"
! Pin # !! Name !! Port !! Description
|-
| 1 || - || || -
|-
| 2 || - || || -
|-
| 3 || - || || -
|-
| 4 || - || || -
|-
| 5 || - || || -
|-
| 6 || - || || -
|-
| 7 || - || || -
|-
| 8 || - || || -
|-
| 9 || - || || -
|-
| 10 || - || || -
|-
| 11 || - || || -
|-
| 12 || - || || -
|-
| 13 || - || || -
|-
| 14 || - || || -
|-
| 15 || - || || -
|-
| 16 || - || || -
|-
| 17 || - || || -
|-
| 18 || - || || -
|-
|-
| 19 || - || || -
| Standard || rowspan="4" | preamble<br />8 byte || rowspan="4" | IPG<br />12 byte || rowspan="4" | frame header<br />14 byte || rowspan="4" | FCS<br />4 byte || 1500 || rowspan="4" | IPv4 header<br />20 byte || rowspan="4" | TCP header<br />20 byte || 1460 byte || 1538 byte || {{round|94.928478544}}%
|-
|-
| 20 || - || || -
| old gelic || 2308 || 2268 byte || 2346 byte || {{round|96.675191816}}%
|-
|-
| 21 || - || || -
| new gelic || 1518 || 1478 byte || 1556 byte || {{round|94.98714653}}%
|-
|-
| 22 || - || || -
| mod gelic || 1624 || 1584 byte || 1662 byte || {{round|95.306859206}}%
|-
| 23 || - || || -
|-
| 24 || - || || -
|-
| 25 || - || || -
|-
| 26 || - || || -
|-
| 27 || - || || -
|-
| 28 || - || || -
|-
| 29 || - || || -
|-
| 30 || - || || -
|-
| 31 || - || || -
|-
| 32 || - || || -
|-
| 33 || - || || -
|-
| 34 || - || || -
|-
| 35 || - || || -
|-
| 36 || - || || -
|-
| 37 || - || || -
|-
| 38 || - || || -
|-
| 39 || - || || -
|-
| 40 || - || || -
|-
| 41 || - || || -
|-
| 42 || - || || -
|-
| 43 || - || || -
|-
| 44 || - || || -
|-
| 45 || - || || -
|-
| 46 || - || || -
|-
| 47 || - || || -
|-
| 48 || - || || -
|-
| 49 || - || || -
|-
| 50 || - || || -
|-
| 51 || - || || -
|-
| 52 || - || || -
|-
| 53 || - || || -
|-
| 54 || - || || -
|-
| 55 || - || || -
|-
| 56 || - || || -
|-
| 57 || - || || -
|-
| 58 || - || || -
|-
| 59 || - || || -
|-
| 60 || - || || -
|-
| 61 || - || || -
|-
| 62 || - || || -
|-
| 63 || - || || -
|-
| 64 || - || || -
|-
|-
|}
|}
</div>


== Jumbo frames ==
From Linux perspective (under OtherOS &lt;=3.15), the old drivers set the [http://git.kernel.org/?p=linux/kernel/git/next/linux-next.git;a=blob;f=drivers/net/ps3_gelic_net.h;h=5e1c28654e16146918a70e2efbbd3da4619a939f;hb=02c1889166b47b9ade309a8f4b7c4ddf0489d869#l44 MTU to 2308], while newer versions set the [http://git.kernel.org/?p=linux/kernel/git/next/linux-next.git;a=blob;f=drivers/net/ps3_gelic_net.h;h=d9a55b93898b24f2b67a6f54accc5ee064d79bbb;hb=HEAD#l35 MTU of 1518]. This could be a hypervisor restriction (needs research).


MTU is set with vsh using syscall net_ioctl (libnet)
 
{{Motherboard Components}}<noinclude>[[Category:Main]]</noinclude>

Latest revision as of 08:56, 31 August 2018

Gigabit LAN[edit | edit source]

The PS3 has 1 Gigabit Ethernet port. The port accepts Auto-MDIX (automatic medium-dependent interface crossover), so no need for special crosscables when hooking up the PS3 direct to the PC.

Gigabit LAN chips used[edit | edit source]

A sample of the GbLAN chips in different PS3 models:

Ports Size Speed Voltage Packaging Manufacturer Serial Number Description
8 (3 used) 20x20mm Xtal X3501: 25MHz 3.3V/1.9V/1.2V 144-pin TQFP Marvell Alaska 88E6108-LAR1 Used in earlier models (up to CECHGxx/SEM-001)
? ? ? ? ? Marvell Alaska 88E6106-LKJ1 Used in later models (CECHHxx/DIA-001)
? ? ? ? ? ? ? DIA-002 (CECHJxx, CECHKxx)
? ? ? ? ? ? ? VER-001 (CECHLxx, CECHMxx, CECHPxx, CECHQxx)
- - 125MHz 3.3V, 2.5V or 1.8V 64-pin QFN Marvell Alaska 88E1118R-NNC2 Used in Slim models (CECH-20xx/DYN-00x and CECH-21xx/SUR-001)
- 6,5x6,5mm - - 48-pin Marvell Alaska 88E1310-NNB2 Used in Slim models (CECH-25xx/JTP-001/JSD-001, CECH-30xx/KTE-001)
? ? ? ? ? ? ? superslims ?

Jumbo frames[edit | edit source]

From Linux perspective (under OtherOS <=3.15), the old drivers set the MTU to 2308, while newer versions set the MTU of 1518. This could be a hypervisor restriction (needs research). 

MTU is set with vsh using syscall net_ioctl (libnet)

On 3.41 firmware, with a modified ps3_gelic driver, frames of 1624 bytes can be sent and frames of 1628 bytes can be received.

Efficiency[edit | edit source]

Frame type Layer 1 overhead Layer 2 overhead MTU Layer 3 overhead Layer 4 overhead Payload size Total transmitted Efficiency
Standard preamble
8 byte		 IPG
12 byte		 frame header
14 byte		 FCS
4 byte		 1500 IPv4 header
20 byte		 TCP header
20 byte		 1460 byte 1538 byte 94.93%
old gelic 2308 2268 byte 2346 byte 96.68%
new gelic 1518 1478 byte 1556 byte 94.99%
mod gelic 1624 1584 byte 1662 byte 95.31%


Syscon
CXR713F Series
CELL
90 nm
65 nm
45 nm
RSX
90 nm
65 nm
40 nm
28 nm
CELL RAM
(XDR)
Elpida
Qimonda
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(GDDR3 or 5)
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Compatibility
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Flash
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NOR
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On BD board
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Diverse Comp.
Retrieved from "http://www.psdevwiki.com/ps3/index.php?title=GbLAN&oldid=50182"