Template:Elpida memory product code

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Revision as of 07:38, 14 April 2021 by Sandungas (talk | contribs) (this was right, in the datasheets both "SE" and "BG" are simply described as FBGA)
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Elpida memory product code
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Product Family Density Organization Power Supply, Interface Die Rev. Package Speed Internal Code Enviroment Code
X: XDR DRAM 51: 512M
10: 1Gb 		16: x16bit
32: x32bit 		A: 1.8V, DRSL
B: 1.5V +/- 0.075V, DRSL 		A: Rev1
B: Rev2
C: Rev3
D: Rev4 		SE: FBGA
BG: FBGA ? 		3C: 3.2Gbps (tRAC = 35ns, C Bin)
4D: 4.0Gbps (tRAC = 34ns, D Bin) 		A2: ? E: Lead Free
F: Lead & Halogen Free
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