Editing Hardware Flashers:NAND pinout

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= NAND Consoles =
[[Category:Hardware]]
= Introduction =
These are the earliest revisions of the PS3 motherboards: [[CECHAxx|CECHA]]/[[COK-00x|COK-001]], [[CECHBxx|CECHB]]/[[COK-00x|COK-001]], [[CECHCxx|CECHC]]/[[COK-00x|COK-002]], [[CECHExx|CECHE]]/[[COK-00x|COK-002W]], [[CECHGxx|CECHG]]/[[SEM-00x|SEM-001]] and contain 2x NAND chips for a total of 256MB. These chips are interleaved which is controlled by a proprietary controller chip codenamed "[[Starship2]]" or SS2. This chip handles the interleaving and presents the NAND Chips to the [[South Bridge]] as a single large coherent flash over a proprietary EBUS.
These are the earliest revisions of the PS3 motherboards: [[CECHAxx|CECHA]]/[[COK-00x|COK-001]], [[CECHBxx|CECHB]]/[[COK-00x|COK-001]], [[CECHCxx|CECHC]]/[[COK-00x|COK-002]], [[CECHExx|CECHE]]/[[COK-00x|COK-002W]], [[CECHGxx|CECHG]]/[[SEM-00x|SEM-001]] and contain 2x NAND chips for a total of 256MB. These chips are interleaved which is controlled by a proprietary controller chip codenamed "[[Starship2]]" or SS2. This chip handles the interleaving and presents the NAND Chips to the [[South Bridge]] as a single large coherent flash over a proprietary EBUS.


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=== TriState on NAND consoles ===
=== TriState on NAND consoles ===
using [[Starship2]] to southbridge /SB_EBUS_ACK @ SB_MAIN(P30)  (numbered 52 in [[:File:SS2_NOR.JPG]])
using [[Starship2]] to southbridge /SB_EBUS_ACK @ SB_MAIN(P30)  (numbered 52 in [[:File:SS2_NOR.JPG]])
* CECHA (COK-001): IC3801:CXD4302GB-T6 pin:C1/ ebus jl:9308 (page 20 of [https://web.archive.org/web/*/http://ps3devwiki.com/files/documents/-PS3%20Service%20Manuals/ servicemanual])
* CECHA (COK-001): IC3801:CXD4302GB-T6 pin:C1/ ebus jl:9308 (page 20 of [http://www.ps3devwiki.com/files/documents/-PS3%20Service%20Manuals/ servicemanual])
* CECHC + CECHE (COK-002): IC3801:CXD4302GB-T6 pin:C1/ ebus jl:9308 (page 20 of [https://web.archive.org/web/*/http://ps3devwiki.com/files/documents/-PS3%20Service%20Manuals/ servicemanual])
* CECHC + CECHE (COK-002): IC3801:CXD4302GB-T6 pin:C1/ ebus jl:9308 (page 20 of [http://www.ps3devwiki.com/files/documents/-PS3%20Service%20Manuals/ servicemanual])
* CECHG (SEM001): IC3801:CXD9909GB pin:C1/ ebus jl:9308 (page 21 of [https://web.archive.org/web/*/http://ps3devwiki.com/files/documents/-PS3%20Service%20Manuals/ servicemanual])
* CECHG (SEM001): IC3801:CXD9909GB pin:C1/ ebus jl:9308 (page 21 of [http://www.ps3devwiki.com/files/documents/-PS3%20Service%20Manuals/ servicemanual])


=== NAND Pinout table ===
=== NAND Pinout table ===
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{{Hardware Flashers}}<noinclude>[[Category:Main]]</noinclude>
{{Hardware Flashers}}
 
[[Category:Hardware Flashers]]
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