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Emulation of Playstation 2 is currently handled by 3 kind of emulators. CECH-A/B models use ps2_emu.self able to use built-in PS2 hardware (EE/GS/Rambus memory), and have best compatibility. CECH-C/E use ps2_gxemu, this emulator use physical Graphic Synthesizer found in this ps3 model, but Emotion Engine is fully emulated here, also there is no Rambus memory. All other models emulate PS2 thru fully software based ps2_netemu used for ps2 classics, and hacked now to use decrypted ISO files. Earlier before Sony provided ps2 classics on PS Store there was another soft only emulator strongly based on ps2_gxemu. It was called ps2_softemu, and had support for original PS2 CDVD. Only emulator not able to run physical discs is ps2_netemu.  
Emulation of Playstation 2 is currently handled by 3 kind of emulators. CECH-A/B models use ps2_emu.self able to use built-in PS2 hardware (EE/GS/Rambus memory), and have best compatibility. CECH-C/E use ps2_gxemu, this emulator use physical Graphic Synthesizer found in this ps3 model, but Emotion Engine is fully emulated here, also there is no Rambus memory. All other models emulate PS2 thru fully software based ps2_netemu used for ps2 classics, and hacked now to use decrypted ISO files. Earlier before Sony provided ps2 classics on PS Store there was another soft only emulator strongly based on ps2_gxemu. It was called ps2_softemu, and had support for original PS2 CDVD. Only emulator not able to run physical discs is ps2_netemu.  


Emulators are self files, but not typical one. Emulators are not truly PS3 Game OS elf executables, but Guest OS'es running on LV1 of PS3. This mean that LV2, or more friendly Game OS is unloaded before emulator is loaded. This also mean that while emulators are running we can't call any LV2 function. Also LV1 syscalls are limited to call from all emulators, but can be fully unlocked.
Emulators are self files, but not typical one. Emulators are not truly PS3 Game OS elf executables, but Guest OS'es running on LV1 of PS3. This mean that LV2, or more friendly Game OS is unloaded before emulator is loaded. This also mean that while emulators are running we can't call any LV2 function. Also LV1 syscalls are limited to call from all emulators, but can be fully unlocked.  


All emulators use built-in stripped developement version of PS2 BIOS with disabled debug functions that can affect some games. This is done because some games print debug info on screen when found that are run on dev bios. Bios between ps2_emu, and ps2_gxemu/ps2_netemu are different. Ps2_emu BIOS is able to run only on ps2emu version of emulator due to RDRAM check.
All emulators use built-in stripped developement version of PS2 BIOS with disabled debug functions that can affect some games. This is done because some games print debug info on screen when found that are run on dev bios. Bios between ps2_emu, and ps2_gxemu/ps2_netemu are different. Ps2_emu BIOS is able to run only on ps2emu version of emulator due to RDRAM check.


PS3 models without Emotion Engine unit use "SPE-compatible SIMD graphics-rounding mode for VMX/Altivec Instructions" for FPU, and VU0 emulated floats calculations. This is set on emulator init by HV call 97 with param 1. VU1 actually run at SPE core so no compatibility mode need (or can) to be set. SPE compatible mode for PPE mean that rounding mode is set as round to zero, denormals are treated as zero, and there are no infinities or NaNs. So theoretically what PS2 FPU/VU was originally. Although SPE and PPE SPE compatibility mode is still inaccurate comparing to PS2, because Sony decided to cut off 2 guard bits from calculations on PS2. Probably because there was no need for round and sticky bits (no Nan/Inf, one round mode, etc.). Additionally float divide algorithm is custom and not fully understood up to this day. Good example here are TriAce games, or Castlevania COD where SPE calculation is wrong by 1 bit making games unplayable without patch. This are PS2 math algo specific inaccuracies in FPU/VU implementation that are not present on any other hardware.
PS3 models without Emotion Engine unit use "SPE-compatible SIMD graphics-rounding mode for VMX/Altivec Instructions" for FPU, and VU0 emulated floats calculations. This is set on emulator init by HV call 97 with param 1. VU1 actually run at SPE core so no compatibility mode need (or can) to be set. SPE compatible mode for PPE mean that rounding mode is set as round to zero, denormals are treated as zero, and there are no infinities or NaNs. So literally what PS2 VU was originally. Although SPE, and PPE SPE compatibility mode can still be inaccurate comparing to PS2. Good example here are TriAce games, or Castlevania COD where SPE calculation is wrong by 1 bit making games unplayable without patch. This is due to some PS2 math algo specific inaccuracies in FPU/VU implementation that are not present on any other hardware.


Note:  
Note:  
* not available in early Tool/DECR and Debug/DEX firmwares. But available in AV TOOL firmware since 1.00
* not available in early Tool/DECR and Debug/DEX firmwares. But available in AV TOOL firmware since 1.00
* Emulation is based on a SCPH-50000/SCPH-20401 Playstation 2 Model.
* Emulation is based on a SCPH-50000/SCPH-20401 Playstation 2 Model.
* [https://web.archive.org/web/20211118050305/http://unina.stidue.net/Universita'%20di%20Trieste/Ingegneria%20Industriale%20e%20dell'Informazione/Tuzzi/Architetture_Avanzate_dei_Calcolatori/Emotion_2.pdf Introduction to PlayStation2 Architecture.pdf]
* [http://unina.stidue.net/Universita'%20di%20Trieste/Ingegneria%20Industriale%20e%20dell'Informazione/Tuzzi/Architetture_Avanzate_dei_Calcolatori/Emotion_2.pdf Introduction to PlayStation2 Architecture.pdf]
* ps2tek docs - https://psi-rockin.github.io/ps2tek/
* ps2tek docs - https://psi-rockin.github.io/ps2tek/


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<span style="font-size:small">
<span style="font-size:small">
{{dot}}'''Decrypted (elf)''': changes <abbr title="when comparing two decrypted files of the same revision from different firmwares the only difference is the build label">every firmware version</abbr><br>
{{widedot}}'''Decrypted (elf)''': changes <abbr title="when comparing two decrypted files of the same revision from different firmwares the only difference is the build label">every firmware version</abbr><br>
{{dot}}'''<abbr title="0x20 bytes">Build label</abbr>''': yes, with timestamp, search for '''ps2ver:'''<br>
{{widedot}}'''<abbr title="0x20 bytes">Build label</abbr>''': yes, with timestamp, search for '''ps2ver:'''<br>
{{dot}}'''Target Firmware''': no/unknown<br>
{{widedot}}'''Target Firmware''': no/unknown<br>
{{dot}}'''Revision''': unknown
{{widedot}}'''Revision''': unknown
</span>
</span>
</div>
</div>
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|}
<span style="font-size:small">
<span style="font-size:small">
{{dot}}'''Decrypted (elf)''': changes <abbr title="when comparing two decrypted files of the same revision from different firmwares there are no differences">every emu revision</abbr><br>
{{widedot}}'''Decrypted (elf)''': changes <abbr title="when comparing two decrypted files of the same revision from different firmwares there are no differences">every emu revision</abbr><br>
{{dot}}'''<abbr title="0x20 bytes">Build label</abbr>''': no/unknown<br>
{{widedot}}'''<abbr title="0x20 bytes">Build label</abbr>''': no/unknown<br>
{{dot}}'''Target Firmware''': no/unknown<br>
{{widedot}}'''Target Firmware''': no/unknown<br>
{{dot}}'''Revision''': unknown
{{widedot}}'''Revision''': unknown
</span>
</span>
</div><div style="float:left; width:24%;">
</div><div style="float:left; width:24%;">
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|}
<span style="font-size:small">
<span style="font-size:small">
{{dot}}'''Decrypted (elf)''': changes <abbr title="when comparing two decrypted files of the same revision from different firmwares there are no differences">every emu revision</abbr><br>
{{widedot}}'''Decrypted (elf)''': changes <abbr title="when comparing two decrypted files of the same revision from different firmwares there are no differences">every emu revision</abbr><br>
{{dot}}'''<abbr title="0x20 bytes">Build label</abbr>''': no/unknown<br>
{{widedot}}'''<abbr title="0x20 bytes">Build label</abbr>''': no/unknown<br>
{{dot}}'''Target Firmware''': no/unknown<br>
{{widedot}}'''Target Firmware''': no/unknown<br>
{{dot}}'''Revision''': unknown
{{widedot}}'''Revision''': unknown
</span>
</span>
</div><div style="float:left; width:24%;">
</div><div style="float:left; width:24%;">
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|}
|}
<span style="font-size:small">
<span style="font-size:small">
{{dot}}'''Decrypted (elf)''': changes <abbr title="when comparing two decrypted files of the same revision from different firmwares there are no differences">every emu revision</abbr><br>
{{widedot}}'''Decrypted (elf)''': changes <abbr title="when comparing two decrypted files of the same revision from different firmwares there are no differences">every emu revision</abbr><br>
{{dot}}'''<abbr title="0x20 bytes">Build label</abbr>''': yes, without timestamp, search for '''build r'''<br>
{{widedot}}'''<abbr title="0x20 bytes">Build label</abbr>''': yes, without timestamp, search for '''build r'''<br>
{{dot}}'''Target Firmware''': included in the build label<br>
{{widedot}}'''Target Firmware''': included in the build label<br>
{{dot}}'''Revision''': yes, <abbr title="the location can be seen by comparing 4.23 (value 0x40DC) with 4.25 (value 0x4164) at offset 0x3E4BA in both">'''one''' time</abbr>, and included in the build label
{{widedot}}'''Revision''': yes, <abbr title="the location can be seen by comparing 4.23 (value 0x40DC) with 4.25 (value 0x4164) at offset 0x3E4BA in both">'''one''' time</abbr>, and included in the build label
</span>
</span>
</div>
</div>
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===LIMG Segment===
===LIMG Segment===
The ISO.BIN.ENC has a block of 0x4000 bytes added at the end codenamed "LIMG" that works as a descriptor for the ISO structure
The ISO.BIN.ENC have a block of 0x4000 bytes added at the end codenamed "LIMG" that works as a descriptor of the ISO structure


{| class="wikitable"
{| class="wikitable"
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|-
|-
|}
|}
Additionally, emulator access SPU directly with those addresses. <br>
{| class="wikitable"
|-
! Address !! Channel !! Channel description !! Access type !! Notes
|-
| 0x44004 || SPU_Out_Mbox || SPU Outbound Mailbox Register || Read only || Used to read 32 bits of data from the corresponding SPU outbound mailbox queue. Outbound Mailbox Register has a corresponding SPU Write Outbound Mailbox Channel for writing data into outbound mailbox queue.
|-
| 0x4400C || SPU_In_Mbox || SPU Inbound Mailbox Register || Write only || Used to write 32 bits of data into the corresponding SPU inbound mailbox queue. Inbound mailbox queue has a corresponding SPU Read Inbound Mailbox Channel for reading data from the queue.
|-
| 0x44014 || SPU_Mbox_Stat || SPU Mailbox Status Register || Read only || Contains the current In_Mbox/Out_Mbox/Out_Intr_Mbox count of the mailbox queues in the corresponding SPE. 
|-
| 0x4401C || SPU_RunCntl || SPU Run Control Register || Read/Write || Used to start and stop the execution of instructions in the SPU.
The SPU can dynamically change the state of the Run Status bit (that is, SPU_Status[R]). 
|-
| 0x44024 || SPU_Status || SPU Status Register || Read only || Used to report the status (state) of an SPU. Emulator use it mostly to check if SPU is running (bit31).
|-
| 0x44034 || SPU_NPC || SPU Next Program Counter Register || Read/Write || Contains the address from which an SPU starts executing when the Run Control bit is set in the SPU Run Control Register.
Used in function that start SPU programs, and in interrupts handlers, plus in few other places.
|-
| 0x5400C || SPU_Sig_Notify_1 || SPU Signal Notification 1 Register || Read/Write || Used to write data that can be read in SPU_RdSigNotify1 channel corresponding SPE.
|-
| 0x5C00C || SPU_Sig_Notify_2 || SPU Signal Notification 2 Register || Read/Write || Used to write data that can be read in SPU_RdSigNotify2 channel corresponding SPE.
|-
|}
Address = SPU base + Address. For example, IPU SPU is mapped to 0x40300000 so accessing SPU_Sig_Notify1 will be done by read/write to 0x4035400C.


===PS2 Memory and Hardware Mapped Registers Layout===
===PS2 Memory and Hardware Mapped Registers Layout===
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===ps2_netemu.self===
===ps2_netemu.self===
Support for USB devices seems to be limited comparing to other available emulators. Although PS2 side of USB subsystem seems to be fully implemented. IOP emulator in SPU handle USB HW registers addresses and generate interrupt for PPU which later handle RW to mentioned registers in similar fashion to ps2_emu/ps2_gxemu. PS2 side of things can be disabled/enabled using one byte, when disabled USB writes are ignored, and USB reads return 0. Initial state is unknown. Emulator seems to accept HID controllers and use them as DS3.
<br/><br/>
Supported devices:
#BD Remote Control
#BD Remote Control
#PLAYSTATION(R)3 Controller (Vendor ID 0x54C, Product ID 0x268),  
#PLAYSTATION(R)3 Controller (Vendor ID 0x54C, Product ID 0x268),  
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#Vendor ID 0xF0D (Hori), Product ID 0x4A  
#Vendor ID 0xF0D (Hori), Product ID 0x4A  
#Vendor ID 0x54C (Sony), Product ID 0x5AF
#Vendor ID 0x54C (Sony), Product ID 0x5AF
<br/>
Few peripherals not listed above work fine or with issues.
#PS3 Dance Dance Revolution Dance Pad - not ps2 accessory, opposite arrows can't be pressed at the same time.
#Pop'N Music controllers - Require PS2 to USB converter. Wrong button mappings can be fixed by remap in config file.
#Retro-Bit Official SEGA Mega Drive USB 6-Button Controller. Mapped for PS3 already and also works with this emulator. Lacks analogue sticks and shoulder buttons.


==BIOS==
==BIOS==
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| ADDDRV || 0x85E960 || 0x3DF60 ||  Adds support for the DVD ROM (rom1:), via ROMDRV. || ELF
| ADDDRV || 0x85E960 || 0x3DF60 ||  Adds support for the DVD ROM (rom1:), via ROMDRV. || ELF
|-
|-
| STDIO || 0x85EDC0 || 0x3D3C0 || Standard I/O library. || ELF
| STDIO || 0x85DDC0 || 0x3D3C0 || Standard I/O library. || ELF
|-
|-
| SIFMAN || 0x85F9B0 || 0x3EFB0 || SIF manager. || ELF
| SIFMAN || 0x85F9B0 || 0x3EFB0 || SIF manager. || ELF
Line 1,053: Line 1,017:
| RDRAM || 0x861A00 || 0x41000  || Provides a RDRAM test for the EE at power-on. This is run from RESET. || BIN
| RDRAM || 0x861A00 || 0x41000  || Provides a RDRAM test for the EE at power-on. This is run from RESET. || BIN
|-
|-
| - || 0x864190 || 0x43A30 ||  || BIN
| EELOADCNF || 0x864750 || 0x43D50 || Contains the IOP boot configuration file for EELOAD. || BIN
|-
| EELOADCNF || 0x864200 || 0x43D50 || Contains the IOP boot configuration file for EELOAD. || BIN
|-
|-
| SIFCMD || 0x864900 || 0x43F00 || SIF command module. Contains the SIF command and SIF RPC functions. || ELF
| SIFCMD || 0x864900 || 0x43F00 || SIF command module. Contains the SIF command and SIF RPC functions. || ELF
Line 1,080: Line 1,042:
|-
|-
| - || 0x87FE20 || 0x5F420 ||  || BIN
| - || 0x87FE20 || 0x5F420 ||  || BIN
|-
| BNNETCNF || 0x881D00 || 0x61300 ||  Network configuration. Used by BB Navigator Network Configuration Library. || BIN
|-
|-
| MCSERV || 0x881D40 || 0x61340 ||  RPC server for MCMAN. || ELF
| MCSERV || 0x881D40 || 0x61340 ||  RPC server for MCMAN. || ELF
Line 1,091: Line 1,051:
| - || 0x8866C0 || 0x65CC0 ||  || BIN
| - || 0x8866C0 || 0x65CC0 ||  || BIN
|-
|-
| KROM || 0x886A30 || 0x66030 || Kanji ROM? Not sure where this is used. || BIN
| KROM || 0x886A00 || 0x66000 || Kanji ROM? Not sure where this is used. || BIN
|-
|-
| - || 0x8A0870 || 0x7FE70 ||  || BIN
| - || 0x8A0870 || 0x7FE70 ||  || BIN
Line 1,196: Line 1,156:
*Notes
*Notes
**List of PS2 disc games compatibles with PS3 HDD installation hardcoded in '''dev_flash/vsh/module/[[game_ext_plugin]].sprx'''
**List of PS2 disc games compatibles with PS3 HDD installation hardcoded in '''dev_flash/vsh/module/[[game_ext_plugin]].sprx'''
**Virtual PS2 HDD support module '''dev_flash/vsh/module/[[libps2hdd]].sprx''' ?
**Virtuall PS2 HDD support module '''dev_flash/vsh/module/[[libps2hdd]].sprx''' ?


===PS2 System Data (PSN HDD Tool package)===
===PS2 System Data (PSN HDD Tool package)===
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===ps2_netemu syscalls ===
===ps2_netemu syscalls ===
Vector at 0xC00 address.
Vector at 0xC00 address.
  0x00 -
  0x0 - 0 = exec smth,  
      0 = return ((unk from 0x1C30/0x1C38 << 56) | thread_number << 48 | ctrl_CT1 (in bit 30) | srr1_EE (in bit 15) | srr1_PS (in bit 14) | srr1_DR (in bit 4))
       1 = 0x132 lv1 panic,
          Where 0x1C30/0x1C38 is selected depending on current HW thread.
       2 = 0x133 lv1 panic,
          Thread number is current SW thread
       3 = 0x134 lv1 panic,
          ctrl_CT1 is lower bit of CT (Current Thread) from PPC Control Register (0 for HW0, 1 for HW1)
       4 = 0x135 lv1 panic,
          srr1_EE is MSR Enable External Interrupts bit from time when exception occurred (from before syscall was executed)
       else = 0x136 lv1 panic)
          srr1_PS is MSR Problem State bit from time when exception occurred (from before syscall was executed)
  0xC - exec smth
          srr1_DR is MSR Data Relocate bit from time when exception occurred (from before syscall was executed)
  0x5 - exec smth
       1 = 0x132 lv1 panic
  0x6 - exec smth
       2 = 0x133 lv1 panic
  0x10 - lv1 panic
       3 = 0x134 lv1 panic
       4 = 0x135 lv1 panic
       else = 0x136 lv1 panic
0x02 - Destroy init code and perform illegal instructions check. Memzero following addresses:
      CODE: 0x16000 - 0x20B80
      DATA: 0x930F80 - 0x933F80
      UNK:  0x3D016000 - 0x3D020B80
0x03 - Enable additional code related to VU0/COP2.
      3 = Patch 0x186C10 to NOP
      4 = Patch 0x186C40 to NOP
      anything else = LV1 panic
0x04 - Unknown. Available for HW0 only.
0x05 - External interrupts disable (48 bit in MSR). Returns previous MSR state.
  0x06 - External interrupts enable (48 bit in MSR) if param & 0x8000 is not 0, otherwise disable them.
      This sc is more like restore 48th bit of MSR, but many times emu use it to enable bit without using old state.
      Also, emulator panic LV1 if syscall is called while external interrupts are already enabled.
0x0A - IPU emulation related syscall
  0x0B - IPU emulation related syscall
  0x0C - Used in PS2 COP0 MTC0/MFC0 r9/r25 (count/perf), decrementer/timing related, return value in r15.
        Config CMD 0x17 disable that syscall for r9 (count) r/w, and alternative path is used. Perf r/w still use it.
0x0E - PS2 counters/timers related (also used on vsync related functions).
0x0F - PS2 counters/timers related (also used on vsync related functions).
  0x10 - lv1 panic.
0x11 - Wrapper for lv1_read_virtual_uart(port_number, buffer, bytes) [HW0 only, only ports 0 and 2 available, else panic]
0x12 - Wrapper for lv1_storage_send_device_command(dev_id, cmd_id, cmd_block, cmd_size, data_buffer, blocks)
      [HW0 only, Available only for threads: VRC, MECHA, HDD, else panic]
      params are rearranged:
      r3 = cmd_block (0x245E000 is added to this value internally)
      r4 = data_buffer (0x245E000 is added to this value internally)
      r5 = blocks
      dev_id is taken from 0x245D008 and it is 0(HDD) for my dump.
      cmd_id = 0x88 and cmd_size is 8.
0x13 - Set thread info unknown byte to 1 for respective thread and set unknown byte to 1 in USB thread.
      [HW0 only, else panic. Available only for threads: BL2MAIN and BL2LNK, else do nothing in exception handler]
0x14 - Same as 0x13 but set all bits to 0 regardless which thread called it.
      [HW0 only, else panic. Available only for threads: BL2MAIN and BL2LNK, else do nothing in exception handler]
0x1002 - Invalidate gpu hvcalls.
  0x800000XX - HV Syscall where XX is syscall nr.
  0x800000XX - HV Syscall where XX is syscall nr.
  else (other syscalls) - jump to 0x12670 (FW4.78 - current) for HW_0
  else (other syscalls) - jump to 0x12670 (FW4.78 - current) for HW_0
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If you want to read some speculation and brainstorming about them, please join the {{talk}} page
If you want to read some speculation and brainstorming about them, please join the {{talk}} page


<div>
<div style="float:top; text-align:center;">'''PS2 Emulators Config Commands Overview'''</div>
<div style="float:left; width:50%;">
<div style="float:right; padding-right:5px;">
{| class="wikitable" style="font-size:85%; line-height:100%; text-align:center"
{| class="wikitable" style="font-size:85%; line-height:100%; text-align:center"
|+PS2 Emulators Config Commands Overview
|-
! rowspan="2" | Command Name !! colspan="3" | Command ID !! rowspan="2" style="padding:1px" | Max<br>Usage !! colspan="4" | Command Data
! rowspan="2" | Command Name !! rowspan="36" style="padding:0px" |  || colspan="3" | Command ID !! rowspan="36" style="padding:0px" |  || rowspan="2" style="padding:1px" | Max<br>Usage !! rowspan="36" style="padding:0px" |  || colspan="4" | Command Data
|-
|-
! style="padding:1px" | gxemu !! style="padding:1px" | softemu !! style="padding:1px" | netemu !! Length !! colspan="3" | Params
! style="padding:1px" | gxemu !! style="padding:1px" | softemu !! style="padding:1px" | netemu !! Length !! colspan="3" | Params
Line 1,491: Line 1,418:
| 0x00 || 0x00 || 0x01
| 0x00 || 0x00 || 0x01
| 3 ? || style="text-align:left" | 2&nbsp;*&nbsp;uint32_t
| 3 ? || style="text-align:left" | 2&nbsp;*&nbsp;uint32_t
| {{cellcolors|#555|#fff|center}} offset || colspan="2" {{cellcolors|#555|#fff|center}} functionid
| {{cellcolors|#555|#fff|center}} offset || {{cellcolors|#555|#fff|center}} functionid
|-
|-
! {{cellcolors|#fff|#000}} Set something
! {{cellcolors|#fff|#000}} Set something
| 0x01 || 0x01 || 0x02
| 0x01 || 0x01 || 0x02
| 1 || style="text-align:left" | uint32_t
| 1 || style="text-align:left" | uint32_t
| colspan="3" | ?
| colspan="3" | 1000=?<br>3000=?<br>6000=?
|-
|-
! {{cellcolors|#fff|#000}} Skip r5900 CACHE IXIN/IHIN opcodes
! {{cellcolors|#fff|#000}} Switch something
| 0x02 || 0x02 || 0x03
| 0x02 || 0x02 || 0x03
| 1 || style="text-align:left" | 0
| 1 || style="text-align:left" | 0
Line 1,506: Line 1,433:
| 0x03 || 0x03 || 0x04
| 0x03 || 0x03 || 0x04
| 1 || style="text-align:left" | uint32_t
| 1 || style="text-align:left" | uint32_t
| colspan="3" | ?
| colspan="3" | 8=?<br>0x10=?
|-
|-
! {{cellcolors|#bd5|#000}} Alternative VIF1 DIRECT/DIRECTHL handler
! {{cellcolors|#bd5|#000}} Set DIRECT/DIRECTHL VIF1 in SP3 EEDMA
| 0x04 || 0x04 || {{cellcolors|#eee|#b44|center}} <abbr style="cursor:help; text-decoration:none" title="Not Available">0x05</abbr>
| 0x04 || 0x04 || {{cellcolors|#eee|#b44|center}} 0x05
| 1 || style="text-align:left" | 0
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
|-
! {{cellcolors|#fff|#000}} Alternative VIF1 OFFSET handler
! {{cellcolors|#fff|#000}} Switch something
| 0x05 || 0x05 || 0x06
| 0x05 || 0x05 || 0x06
| 1 || style="text-align:left" | 0
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
|-
! {{cellcolors|#c96|#000}} Delay VU1 xgkick by X cycles
! {{cellcolors|#c96|#000}} Delay VU xgkick by X cycles
| 0x06 || 0x06 || 0x07
| 0x06 || 0x06 || 0x07
| 1 || style="text-align:left" | uint32_t
| 1 || style="text-align:left" | uint32_t
| colspan="3" {{cellcolors|#c96|#000|center}} <abbr title="2=2cycles, 4=4cycles, 8=8cycles">cycles</abbr>
| colspan="3" {{cellcolors|#c96|#000|center}} <abbr title="2=2cycles, 4=4cycles, 8=8cycles">cycles</abbr>
|-
|-
! {{cellcolors|#c96|#000}} Patch VU1 memory by <abbr title="two bit masks for original and patched data">bitmask</abbr>
! {{cellcolors|#c96|#000}} Patch VU memory by <abbr title="two bit masks for original and patched data">bitmask</abbr>
| 0x07 || 0x07 || 0x08
| 0x07 || 0x07 || 0x08
| 3 || style="text-align:left" | 8&nbsp;*&nbsp;uint32_t
| 3 || style="text-align:left" | 8&nbsp;*&nbsp;uint32_t
| colspan="3" {{cellcolors|#c96|#000|center}} <abbr title="read mask, read mask, original opcode, original opcode, write mask, write mask, replace opcode, replace opcode">MASK</abbr>
| colspan="3" {{cellcolors|#c96|#000|center}} <abbr title="read mask, read mask, original opcode, original opcode, write mask, write mask, replace opcode, replace opcode">MASK</abbr>
|-
|-
! {{cellcolors|#9f9|#000}} Patch EE memory 64 bit
! {{cellcolors|#9f9|#000}} Patch EE memory with 2 opcodes
| 0x08 || 0x08 || 0x09
| 0x08 || 0x08 || 0x09
| <abbr title="command">1</abbr>→<abbr title="list">32</abbr> || style="text-align:left" | uint32_t&nbsp;+&nbsp;LIST
| <abbr title="command">1</abbr>→<abbr title="list">32</abbr> || style="text-align:left" | uint32_t&nbsp;+&nbsp;LIST
| {{cellcolors|#9f9|#000|center}} <abbr title="amount of patches in the LIST">count</abbr> || colspan="2" {{cellcolors|#9f9|#000|center}} <abbr title="offset, original opcode, original opcode, replace opcode, replace opcode">LIST</abbr>
| {{cellcolors|#9f9|#000|center}} <abbr title="amount of patches in the LIST">count</abbr> || colspan="2" {{cellcolors|#9f9|#000|center}} <abbr title="offset, original opcode, original opcode, replace opcode, replace opcode">LIST</abbr>
|-
|-
! {{cellcolors|#9f9|#000}} Patch EE memory 32 bit
! {{cellcolors|#9f9|#000}} Patch EE memory with 1 opcode
| {{NA}} || {{NA}} || 0x0A
| {{NA}} || {{NA}} || 0x0A
| <abbr title="command">1</abbr>→<abbr title="list">32</abbr> || style="text-align:left" | uint32_t&nbsp;+&nbsp;LIST
| <abbr title="command">1</abbr>→<abbr title="list">32</abbr> || style="text-align:left" | uint32_t&nbsp;+&nbsp;LIST
Line 1,546: Line 1,473:
| 0x0A || 0x0A || 0x0C
| 0x0A || 0x0A || 0x0C
| 1 || style="text-align:left" | 2&nbsp;*&nbsp;uint16_t
| 1 || style="text-align:left" | 2&nbsp;*&nbsp;uint16_t
| <abbr title="0=?, 1=?, 2=?">unk_mode</abbr> || colspan="2" | <abbr title="min 0x0, max 0xFFFF">unk_range</abbr>
| 0=?<br>1=?<br>2=? || colspan="2" | 0=?<br>0x180=?<br>0x400=?<br>0x800=?
|-
|-
! {{cellcolors|#fff|#000}} Set something
! {{cellcolors|#fff|#000}} Set something
| 0x0B || 0x0B || 0x0D
| 0x0B || 0x0B || 0x0D
| 1 || style="text-align:left" | uint32_t
| 1 || style="text-align:left" | uint32_t
| colspan="3" | <abbr title="0=skip, 1=don't skip (default)">skip</abbr>
| colspan="3" | 0=?<br>1=?(default?)
|-
|-
! {{cellcolors|#f93|#000}} COP2 and FPU accurate ADD/SUB address
! {{cellcolors|#f93|#000}} COP2 and FPU accurate ADD/SUB address
Line 1,561: Line 1,488:
| 0x0D || 0x0D || 0x0F
| 0x0D || 0x0D || 0x0F
| 32 || style="text-align:left" | 2&nbsp;*&nbsp;uint32_t
| 32 || style="text-align:left" | 2&nbsp;*&nbsp;uint32_t
| {{cellcolors|#f93|#000|center}} <abbr title="min 0x100000">start&nbsp;offset</abbr> || colspan="2" {{cellcolors|#f93|#000|center}} <abbr title="max 0x1FFFFFFF">end&nbsp;offset</abbr>
| {{cellcolors|#f93|#000|center}} <abbr title="min 0x100000">start offset</abbr> || colspan="2" {{cellcolors|#f93|#000|center}} <abbr title="max 0x1FFFFFFF">end offset</abbr>
|-
|-
! {{cellcolors|#f93|#000}} FPU accurate MUL/DIV range
! {{cellcolors|#f93|#000}} COP2 accurate MUL/DIV range
| 0x0E || 0x0E || 0x10
| 0x0E || 0x0E || 0x10
| 32 || style="text-align:left" | 2&nbsp;*&nbsp;uint32_t
| 32 || style="text-align:left" | 2&nbsp;*&nbsp;uint32_t
| {{cellcolors|#f93|#000|center}} <abbr title="min 0x100000">start&nbsp;offset</abbr> || colspan="2" {{cellcolors|#f93|#000|center}} <abbr title="max 0x1FFFFFFF">end&nbsp;offset</abbr>
| {{cellcolors|#f93|#000|center}} <abbr title="min 0x100000">start offset</abbr> || colspan="2" {{cellcolors|#f93|#000|center}} <abbr title="max 0x1FFFFFFF">end offset</abbr>
|-
|-
! {{cellcolors|#f93|#000}} VU0 accurate ADD/SUB address
! {{cellcolors|#f93|#000}} VU0 accurate ADD/SUB address
Line 1,573: Line 1,500:
| colspan="3" {{cellcolors|#f93|#000|center}} <abbr title="min 0x000, max 0xFF8">offset</abbr>
| colspan="3" {{cellcolors|#f93|#000|center}} <abbr title="min 0x000, max 0xFF8">offset</abbr>
|-
|-
! {{cellcolors|#588|#fff}} VU0/COP2 multi cmd
! {{cellcolors|#588|#fff}} VU related ?
| 0x10 || 0x10 || 0x12
| 0x10 || 0x10 || 0x12
| <abbr title="command">1</abbr>→<abbr title="list">63</abbr> || style="text-align:left" | uint32_t&nbsp;+&nbsp;LIST
| <abbr title="command">1</abbr>→<abbr title="list">63</abbr> || style="text-align:left" | uint32_t&nbsp;+&nbsp;LIST
Line 1,583: Line 1,510:
| colspan="3" {{cellcolors|#dda|#000|center}} time ?
| colspan="3" {{cellcolors|#dda|#000|center}} time ?
|-
|-
! {{cellcolors|#f93|#000}} Alternative VU1 ADD/SUB
! {{cellcolors|#f93|#000}} VU1 transform ADD/SUB
| 0x12 || 0x12 || 0x14
| 0x12 || 0x12 || 0x14
| 1 || style="text-align:left" | 0
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
|-
! {{cellcolors|#fff|#000}} Patch IOP SPE program
! {{cellcolors|#fff|#000}} Set something with bit flags
| 0x13 || 0x13 || 0x15
| 0x13 || 0x13 || 0x15
| 1 || style="text-align:left" | uint32_t
| 1 || style="text-align:left" | uint32_t
| colspan="3" | 2 or higher
| colspan="3" | 2=?<br>4=?<br>0x14=?
|-
|-
! {{cellcolors|#fff|#000}} Unknown
! {{cellcolors|#fff|#000}} Unknown
| 0x14? || 0x14? || {{cellcolors|#eee|#b44|center}} <abbr style="cursor:help; text-decoration:none" title="Not Available">0x16</abbr>
| 0x14? || 0x14? || {{cellcolors|#eee|#b44|center}} 0x16
| ? || style="text-align:left" | ?
| ? || style="text-align:left" | ?
| colspan="3" | ?
| colspan="3" | ?
|-
|-
! {{cellcolors|#9cf|#000}} Alternative COP0 MTC0/MFC0 Count ($9) handler
! {{cellcolors|#9cf|#000}} COP0 configure MTC0/MFC0
| 0x15 || 0x15 || 0x17
| 0x15 || 0x15 || 0x17
| 1 || style="text-align:left" | uint8_t ?
| 1 || style="text-align:left" | uint8_t ?
Line 1,604: Line 1,531:
|-
|-
! {{cellcolors|#fff|#000}} Switch something
! {{cellcolors|#fff|#000}} Switch something
| 0x16 || 0x16 || {{cellcolors|#eee|#b44|center}} <abbr style="cursor:help; text-decoration:none" title="Not Available">0x18</abbr>
| 0x16 || 0x16 || {{cellcolors|#eee|#b44|center}} 0x18
| 1 || style="text-align:left" | 0
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
Line 1,613: Line 1,540:
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
|-
! {{cellcolors|#fff|#000}} End fromIPU DMA transfer on BCLR command
! {{cellcolors|#fff|#000}} Switch something
| 0x17 || 0x18 || 0x1A
| 0x17 || 0x18 || 0x1A
| 1 || style="text-align:left" | 0
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
|-
! {{cellcolors|#fff|#000}} IPU IDEC Hack
! {{cellcolors|#fff|#000}} Switch something
| 0x18 || 0x19 || 0x1B
| 0x18 || 0x19 || 0x1B
| 1 || style="text-align:left" | 0
| 1 || style="text-align:left" | 0
Line 1,636: Line 1,563:
| 0x1B || {{NA}} || 0x1E
| 0x1B || {{NA}} || 0x1E
| 1 || style="text-align:left" | uint8_t
| 1 || style="text-align:left" | uint8_t
| colspan="3" | ?
| colspan="3" | 3=?
|-
|-
! {{cellcolors|#fff|#000}} Enable VIF0 cmds MSXXX/MPG/FLUSHE timings.
! {{cellcolors|#fff|#000}} Set something
| 0x1C || 0x1C || 0x1F
| 0x1C || 0x1C || 0x1F
| 1 || style="text-align:left" | uint32_t
| 1 || style="text-align:left" | uint32_t
| colspan="3" | Initial cycles to run
| colspan="3" | 200=?<br>1000=?(default)
|-
|-
! {{cellcolors|#fff|#000}} Set something
! {{cellcolors|#fff|#000}} Set something
| 0x1D || 0x1D || 0x20
| 0x1D || 0x1D || 0x20
| 1 || style="text-align:left" | uint64_t
| 1 || style="text-align:left" | uint64_t
| colspan="3" | ?
| colspan="3" | 10=?<br>60=?(default)<br>100=?<br>120=?<br>200=?<br>240=?
|-
|-
! {{cellcolors|#fff|#000}} Set something
! {{cellcolors|#fff|#000}} Set something
| 0x1E || 0x1E || 0x21
| 0x1E || 0x1E || 0x21
| 1 || style="text-align:left" | uint32_t
| 1 || style="text-align:left" | uint32_t
| colspan="3" | ?
| colspan="3" | 0=?<br>1=?<br>2=?
|}
</div>
</div>
<div style="float:right; width:50%;">
<div style="float:left; padding-left:5px;">
{| class="wikitable" style="font-size:85%; line-height:100%; text-align:center"
|-
! rowspan="2" | Command Name !! rowspan="39" style="padding:0px" |  || colspan="3" | Command ID !! rowspan="39" style="padding:0px" |  || rowspan="2" style="padding:1px" | Max<br>Usage !! rowspan="39" style="padding:0px" |  || colspan="4" | Command Data
|-
|-
! {{cellcolors|#fff|#000}} Switch something
! style="padding:1px" | gxemu !! style="padding:1px" | softemu !! style="padding:1px" | netemu !! Length !! colspan="3" | Params
|-
! {{cellcolors|#fff|#000}} Switch something
| {{NA}} || 0x1F || 0x22
| {{NA}} || 0x1F || 0x22
| 1 || style="text-align:left" | 0
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
|-
! {{cellcolors|#fff|#000}} Snowblind Engine hack
! {{cellcolors|#fff|#000}} Switch something
| 0x1F || 0x20 || 0x23
| 0x1F || 0x20 || 0x23
| 1 || style="text-align:left" | 0
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
|-
! {{cellcolors|#ddf|#000}} SIO2 Delay
! {{cellcolors|#ddf|#000}} Internal image aspect ratio ?
| 0x20 || 0x21 || 0x24
| 0x20 || 0x21 || 0x24
| 1 || style="text-align:left" | uint64_t
| 1 || style="text-align:left" | uint64_t
| colspan="3" | ?
| colspan="3" | 12000=?<br>48000=?
|-
|-
! {{cellcolors|#fff|#000}} Switch something
! {{cellcolors|#fff|#000}} Switch something
| 0x21 || 0x22 || {{cellcolors|#eee|#b44|center}} <abbr style="cursor:help; text-decoration:none" title="Not Available">0x25</abbr>
| 0x21 || 0x22 || {{cellcolors|#eee|#b44|center}} 0x25
| 1 || style="text-align:left" | 0
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
Line 1,676: Line 1,613:
| 0x22 || 0x23 || 0x26
| 0x22 || 0x23 || 0x26
| 32 || style="text-align:left" | 2&nbsp;*&nbsp;uint32_t
| 32 || style="text-align:left" | 2&nbsp;*&nbsp;uint32_t
| {{cellcolors|#f93|#000|center}} <abbr title="min 0x100000">start&nbsp;offset</abbr> || colspan="2" {{cellcolors|#f93|#000|center}} <abbr title="max 0x1FFFFFFF">end&nbsp;offset</abbr>
| {{cellcolors|#f93|#000|center}} <abbr title="min 0x100000">start offset</abbr> || colspan="2" {{cellcolors|#f93|#000|center}} <abbr title="max 0x1FFFFFFF">end offset</abbr>
|-
|-
! {{cellcolors|#f93|#000}} COP2 accurate ADD/SUB range
! {{cellcolors|#f93|#000}} COP2 accurate ADD/SUB range
| 0x23 || 0x24 || 0x27
| 0x23 || 0x24 || 0x27
| 32 || style="text-align:left" | 2&nbsp;*&nbsp;uint32_t
| 32 || style="text-align:left" | 2&nbsp;*&nbsp;uint32_t
| {{cellcolors|#f93|#000|center}} <abbr title="min 0x100000">start&nbsp;offset</abbr> || colspan="2" {{cellcolors|#f93|#000|center}} <abbr title="max 0x1FFFFFFF">end&nbsp;offset</abbr>
| {{cellcolors|#f93|#000|center}} <abbr title="min 0x100000">start offset</abbr> || colspan="2" {{cellcolors|#f93|#000|center}} <abbr title="max 0x1FFFFFFF">end offset</abbr>
|-
|-
! {{cellcolors|#aaf|#000}} Set something <abbr title="PS2 MECHACON related">(CDVD)</abbr>
! {{cellcolors|#aaf|#000}} Set something <abbr title="PS2 MECHACON related">(CDVD)</abbr>
| 0x24 || 0x25? || 0x28
| 0x24? || 0x25? || 0x28
| 1 || style="text-align:left" | uint32_t
| 1 || style="text-align:left" | uint32_t
| colspan="3" | ?
| colspan="3" | 0=?<br>1=?<br>2=?<br>3=?
|-
|-
! {{cellcolors|#aaf|#000}} CDVD seek timing
! {{cellcolors|#aaf|#000}} CDVD read/seek timings ?
| 0x25 || 0x26? || 0x29
| 0x25? || 0x26? || 0x29
| 1 || style="text-align:left" | 2&nbsp;*&nbsp;uint32_t
| 1 || style="text-align:left" | 2&nbsp;*&nbsp;uint32_t
| ? || colspan="2" | ?
| ? || colspan="2" | ?
|-
|-
! {{cellcolors|#fff|#000}} Switch something
! {{cellcolors|#fff|#000}} Switch something
| 0x26 || 0x27 || 0x2A
| 0x26? || 0x27 || 0x2A
| 1 || style="text-align:left" | 0
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
|-
! {{cellcolors|#aaf|#000}} Enable CDDA hack <abbr title="PS2 MECHACON related">(CDVD)</abbr>
! {{cellcolors|#aaf|#000}} Switch something <abbr title="PS2 MECHACON related">(CDVD)</abbr>
| 0x27? || 0x28 || 0x2B
| 0x27? || 0x28 || 0x2B
| 1 || style="text-align:left" | 0
| 1 || style="text-align:left" | 0
Line 1,706: Line 1,643:
| 0x28 || 0x29 || 0x2C
| 0x28 || 0x29 || 0x2C
| 1 || style="text-align:left" | uint32_t
| 1 || style="text-align:left" | uint32_t
| colspan="3" | ?
| colspan="3" | 1=?
|-
|-
! {{cellcolors|#fff|#000}} Switch something
! {{cellcolors|#fff|#000}} Switch something
| 0x29? || 0x2A || {{cellcolors|#eee|#b44|center}} <abbr style="cursor:help; text-decoration:none" title="Not Available">0x2D</abbr>
| 0x29? || 0x2A || {{cellcolors|#eee|#b44|center}} 0x2D
| 1 || style="text-align:left" | 0
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
Line 1,716: Line 1,653:
| 0x2A || 0x2B || 0x2E
| 0x2A || 0x2B || 0x2E
| 1 || style="text-align:left" | uint32_t
| 1 || style="text-align:left" | uint32_t
| colspan="3" | ?
| colspan="3" | 0x172=?
|-
|-
! {{cellcolors|#fff|#000}} SPU2 multi cmd.
! {{cellcolors|#fff|#000}} Set something
| 0x2B || {{NA}} || 0x2F
| 0x2B || {{NA}} || 0x2F
| 1 || style="text-align:left" | uint32_t
| 1 || style="text-align:left" | uint32_t
| colspan="3" | 1=?
|-
! {{cellcolors|#fff|#000}} Unknown
| {{NA}} || {{NA}} || {{cellcolors|#eee|#b44|center}} 0x30<br>0x31<br>0x32<br>0x33<br>0x34
| ? || style="text-align:left" | ?
| colspan="3" | ?
| colspan="3" | ?
|-
! {{cellcolors|#eee|#b44|left}} Reserved
| {{cellcolors|#eee|#b44|center}} <abbr style="cursor:help; text-decoration:none" title="Not Available">N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A</abbr> || {{cellcolors|#eee|#b44|center}} <abbr style="cursor:help; text-decoration:none" title="Not Available">N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A</abbr> || {{cellcolors|#eee|#b44|center}} <abbr style="cursor:help; text-decoration:none" title="Not Available">0x30<br>0x31<br>0x32<br>0x33<br>0x34</abbr>
| 0 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
|-
! {{cellcolors|#f66|#000}} Enable Force Flip Field
! {{cellcolors|#f66|#000}} Enable Force Flip Field
Line 1,733: Line 1,670:
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
|-
! {{cellcolors|#eee|#b44|left}} Reserved
! {{cellcolors|#fff|#000}} Unknown
| {{cellcolors|#eee|#b44|center}} <abbr style="cursor:help; text-decoration:none" title="Not Available">N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A</abbr> || {{cellcolors|#eee|#b44|center}} <abbr style="cursor:help; text-decoration:none" title="Not Available">N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A</abbr> || {{cellcolors|#eee|#b44|center}} <abbr style="cursor:help; text-decoration:none" title="Not Available">0x36<br>0x37<br>0x38<br>0x39<br>0x3A<br>0x3B<br>0x3C</abbr>
| {{NA}} || {{NA}} || {{cellcolors|#eee|#b44|center}} 0x36<br>0x37<br>0x38<br>0x39<br>0x3A<br>0x3B<br>0x3C
| 0 || style="text-align:left" | 0
| ? || style="text-align:left" | ?
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
| colspan="3" | ?
|-
|-
! {{cellcolors|#c96|#000}} Config revision
! {{cellcolors|#c96|#000}} Config revision
Line 1,771: Line 1,708:
| {{NA}} || {{NA}} || 0x43
| {{NA}} || {{NA}} || 0x43
| 1 || style="text-align:left" | uint32_t
| 1 || style="text-align:left" | uint32_t
| colspan="3" | ?
| colspan="3" | 0=?(default)<br>1=?
|-
|-
! {{cellcolors|#fcc|#000}} Disable smoothing filter
! {{cellcolors|#fcc|#000}} Disable smoothing filter
Line 1,838: Line 1,775:
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|}
|}
</div>
</div>
</div>
<br style="clear: both;" />


<!-- We need to find a better way to organize the commands info below, right now all the info is "constricted" inside the same table but is better to take them out of the table to have more freedon when adding comments, etc... Are a lot so by now i prefer to dont make page sections for every command. Im going to try something that visually looks like page sections but are not (so are not going to be displayed in the TOC at top of the page). With this change we are moving forward because the command info is not going to be inside the same table anymore, im going to split them but the visual look and other details are not going to be definitive because later can be converted into page sections if someone insists in it -->
<!-- We need to find a better way to organize the commands info below, right now all the info is "constricted" inside the same table but is better to take them out of the table to have more freedon when adding comments, etc... Are a lot so by now i prefer to dont make page sections for every command. Im going to try something that visually looks like page sections but are not (so are not going to be displayed in the TOC at top of the page). With this change we are moving forward because the command info is not going to be inside the same table anymore, im going to split them but the visual look and other details are not going to be definitive because later can be converted into page sections if someone insists in it -->




{{Boxcomm|id=0x00|name=Title ID Enforce / Multidisc config|data=1x String in format: ABCD-12345}}
{{Boxcomm|id=0x00|name=Title ID Enforce|data=1x String in format: ABCD-12345}}
Restricts the CONFIG to be used only by a specific [[Template:TITLE_ID_for_Physical_Media|Title ID]]
Restricts the CONFIG to be used only by a specific [[Template:TITLE_ID_for_Physical_Media|Title ID]]<br>
The presence of this command in the CONFIG is optional. If present it needs to be located always at the last position in the CONFIG. When bytes are present after Title ID, emulator read them to setup multidisc info.
The presence of this command in the CONFIG is optional. If present it needs to be located always at the last position in the CONFIG
Multidisc info bytes:
First byte:  Unknown, seems to be unused. 00 in known configs (Grandia 3).
Second byte: Discs count (0-9), when 0 or 1 emulator don't enable multidisc mode.
Third byte:  Which disc in set is this one (0-8 for discs 1-9)
Fourth byte: That one is optional, but very important. When set to 1,
              disc swap menu will be in "Reset game" menu and disc change will trigger reset (default behavior).
              But when this byte is set to 0, new option in main emu menu called "Switch Discs" will appear. Emulator change disc without reset.
              Keep in mind we don't know how accurate swap emulation is here, games are picky for some details.
              Every iso bin enc in set need to have proper data in separate config.
              Disc 1: ISO.BIN.ENC --> CONFIG --> 00 02 00 00,
              00000000  3D 00 00 00 A8 3E 00 00 00 00 00 00 53 4C 55 53  =...¨>......SLUS
              00000010  2D 32 31 33 33 34 00 02 00                      -21334...
              Disc 2: ISO.BIN.ENC2--> CONFIG2--> 00 02 01 00, etc.
              00000000  3D 00 00 00 A8 3E 00 00 00 00 00 00 53 4C 55 53  =...¨>......SLUS
              00000010  2D 32 31 33 34 35 00 02 01                      -21345...
 
              Grandia 3 DISC.IDX, content:
              00000000  00 00                                            ..
 


{{Boxcomm|id=0x01|name=EE_ADD_HOOK|data=2x uint32_t Params (addr, func_id 0-0x3B)}}
{{Boxcomm|id=0x01|name=EE_ADD_HOOK|data=2x uint32_t Params (addr, func_id 0-0x3B)}}
Line 1,870: Line 1,792:
The Maximum Amount of times netemu command 0x01 can be used consecutivelly in the same config is 255. This is actually limit for EE hooks at all, 0x01 don't have own limit.
The Maximum Amount of times netemu command 0x01 can be used consecutivelly in the same config is 255. This is actually limit for EE hooks at all, 0x01 don't have own limit.


<div style="overflow-x:auto">
{| class="wikitable" style="width:100%; font-size:0.9em; line-height:90%"
{| class="wikitable" style="width:100%; font-size:0.9em; line-height:90%"
|-
|-
!Function ID!! Notes
!Function ID!! Notes
|-
|-
|0x00|| FIFA 2000 use it as hook for EE kernel at 0x800017E8 (DMAC related). Command backup value from r5900 s0 register.
|0x00||  
|-
|-
|0x01|| FIFA 2000 use it as hook for EE kernel at 0x80001858 (DMAC related). Command restore previously backed up value to r5900 s0 register.
|0x01|| FIFA 2000 use it as hook for EE kernel at 0x80001858 (DMAC related).  
|-
|-
|0x02||  
|0x02||  
Line 1,888: Line 1,809:
|-
|-
|0x04|| Castle Shikigami II
|0x04|| Castle Shikigami II
  Skip r5900 CACHE IXIN/IHIN (Index/Hit invalidate) opcodes. Same as 0x03 command, but applied of selected ee offset.
  store 0 on 0x94A290 (EMU Memory)
This is probably command from times when 0x03 was non existing, and while it apply on selected ee offset, command never recover default IXIN/IHIN handling.
Note: There is leftover in emulator from command that reenable default behavior, but is unused now, and is not accessible by current config commands.
|-
|-
|0x05|| Force events test if D2_CHCR & 0x100 is true (if GIF dma is running). For more info check _cpuEventTest_Shared from pcsx2. Star Wars games developed by Pandemic Studios (freeze fix), Worms 3D and NBA 08.
|0x05|| Star Wars games developed by Pandemic Studios (freeze fix), Worms 3D and NBA 08.
|-
|-
|0x06|| Force events test if D1_CHCR & 0x100 is true (if VIF1 dma is running). For more info check _cpuEventTest_Shared from pcsx2.
|0x06||  
|-
|-
|0x07||  
|0x07||  
|-
|-
|0x08|| Backup current unmodified COP0 status register state. Then disable EI bit, and notify emu that cmd 0x09 could be run. Harry Potter - Quidditch World Cup US use it at offset 0x2BD45C (EE)
|0x08|| Harry Potter - Quidditch World Cup US use it at offset 0x2BD45C (EE)
|-
|-
|0x09|| Restore COP0 status register state from previously created backup. Harry Potter - Quidditch World Cup US use it at offset 0x2BD620 (EE)
|0x09|| Harry Potter - Quidditch World Cup US use it at offset 0x2BD620 (EE)
|-
|-
|0x0A|| Fix for TriAce executable unpack function.
|0x0A||  
Games unpack data using VU0 microruntime (not COP2). Because unpack involve floating points operations result can be inaccurate. And it is,
exactly by 1 byte. Config add 1 to result of unpacked data. This can be confirmed also on pcsx2 with turned off TriAce hack, example for Radiata Stories US release.
Set breakpoint on 0x124D90, and then when it's hit, add 1 to lower 64 bits of vf03 reg (in vu0f tab) and hit run.
Game now work as it should. On PS3 this probably can be fixed also by 0x11 command, but since they had hook already done before 0x11 was a thing, it stayed as is.
|-
|-
|0x0B|| Set lower 64 bits of mips $at register to 0
|0x0B||  
|-
|-
|0x0C|| Piglet's Big Game
|0x0C|| Piglet's Big Game
Line 1,914: Line 1,829:
|0x0D|| usleep(100)
|0x0D|| usleep(100)
|-
|-
|0x0E|| Used 3 times in Need for Speed - Carbon [Collector's Edition] US.
|0x0E|| Used 3 times in Need for Speed - Carbon [Collector's Edition] US
Used in place where game load code overlays, and in place where game self modify code.
Config run the same function which is run when PS2 syscall 7 (ExecPS2) hook is triggered (0x1831A8 in latest emu memory).
Only difference is that 0x42 overlay is not reloaded, and check for "cdrom0" string is not performed.
Command could be potentially useful for games that like to change own code. Eg. Load "bin" files with code (HSG/HST), or modify own code by direct writes to memory (NFS Carbon CE...)
|-
|-
|0x0F||
|0x0F||  
Grand Theft Auto 3 (SLUS-20062)
Grand Theft Auto 3 (SLUS-20062)
  using 0x348B40, 0x18E1F0, 0x348EC8 ( + 200000000 base )
  using 0x348B40, 0x18E1F0, 0x348EC8 ( + 200000000 base )
Line 1,927: Line 1,838:
  0x348EC8 = Almost end (only loading values preserved on stack) of CTheScripts::ClearSpaceForMissionEntity((CVector const &, CEntity *))  
  0x348EC8 = Almost end (only loading values preserved on stack) of CTheScripts::ClearSpaceForMissionEntity((CVector const &, CEntity *))  
|-
|-
|0x10||
|0x10||  
Grand Theft Auto 3 (SLES-50330)
Grand Theft Auto 3 (SLES-50330), uses 0x349790, 0x10 (somewhat floats related)
  using 0x349790, 0x18E1F0, 0x349B18 ( + 200000000 base )  
  using 0x349790, 0x18E1F0, 0x349B18 ( + 200000000 base )  
  0x349790 = start CTheScripts::ClearSpaceForMissionEntity((CVector const &, CEntity *))  
  0x349790 = start CTheScripts::ClearSpaceForMissionEntity((CVector const &, CEntity *))  
Line 1,934: Line 1,845:
  0x349B18 = Almost end (only loading values preserved on stack) of CTheScripts::ClearSpaceForMissionEntity((CVector const &, CEntity *))  
  0x349B18 = Almost end (only loading values preserved on stack) of CTheScripts::ClearSpaceForMissionEntity((CVector const &, CEntity *))  
|-
|-
|0x11||
|0x11||  
Grand Theft Auto 3 (SLES-50793)
Grand Theft Auto 3 (SLES-50793)
  using 0x3495C0, 0x18E1F0, 0x349948 ( + 200000000 base )
  using 0x3495C0, 0x18E1F0, 0x349948 ( + 200000000 base )
Line 1,942: Line 1,853:
|-
|-
|0x12|| Disney/Pixar Finding Nemo (fixes the pause menu freeze)
|0x12|| Disney/Pixar Finding Nemo (fixes the pause menu freeze)
  if COP0 status EI and EXL bits are 0, and other condition related to DMAC is met...
  if condition met...
  store 0 in [ 0x204FC500 + 200000000 base] 0x4FC500 EE memory, and set lower 64 bits of mips $s0 register to 0.
  store 0 in [ 0x204FC500 + 200000000 base] 0x4FC500 EE memory
|-
|-
|0x13|| Snowblind Engine specific fix. Applies to the beginning of function called initLump. Config is responsible for grabbing data from one of registers for use in 0x14/0x15 hooks. Mentioned data is EE memory offset, if data from 0x13 is 0, 0x14/0x15 don't apply.   
|0x13|| Snowblind Engine specific fix. Applies to the beginning of function called initLump. Config is responsible for grabbing data from one of registers for use in 0x14/0x15 hooks. Mentioned data is EE memory offset, if data from 0x13 is 0, 0x14/0x15 don't apply.   
Line 1,955: Line 1,866:
  store 0x010C9E40 in [ 0x208EAB6C + 200000000 base]
  store 0x010C9E40 in [ 0x208EAB6C + 200000000 base]
|-
|-
|0x17|| NFS HP2 fpu rounding fix.
|0x17||  
  Check if a0 == 0x8000 (32768), apply config if true. Config is little bit more complicated than it should, emu flush all fpu regs to memory just to modify one field in altivec vector register.
  condition r18 == 0x8000
  When condition is met ps2 cop1 f08 register is modified from 0x40490FDB to 0x40490FDA, this result in next operations to end up as negative 0.0 (0x80000000) instead of just 0.0 (0x00000000).
  setting:
Seems to trigger when loading of stage or loading of attract mode is close to finish or done.
  stores 0x40490FDA somewhere
Note: 0x40490FDA (3.14159250) is the highest float approximation to π in hexadecimal without going over the value.<br />
Probably can improve FPU accuracy for some games.
|-
|-
|0x18|| Okami PAL specific hook.  
|0x18|| Okami PAL specific hook.  
Line 1,976: Line 1,889:
  Whole thing looks like HLE version of noped functions.
  Whole thing looks like HLE version of noped functions.
|-
|-
|0x19|| Burnout 2
|0x19||  
Copy lower 64 bits of $v0 r5900 register to lower 64 bits of $a1 r5900 register.
All that to make next opcode (hook address + 4) "beq $a1, $v0, addr" always true. Because $a1 and $v0 now have the same value.
This in turn skip CTimer::GetTimeSeconds((void)) in function CReplay::NextFrame((CDrivingControls *)). Worth to note that CReplay::NextFrame seems to be not related to replay per se, but to car physics.
|-
|-
|0x1A||
|0x1A||  
  store 0 in [ 0x209FD560 + 200000000 base]
  store 0 in [ 0x209FD560 + 200000000 base]
  store 0 in [ 0x209F9550 + 200000000 base]
  store 0 in [ 0x209F9550 + 200000000 base]
Line 2,038: Line 1,948:
|-
|-
|0x2B||  
|0x2B||  
if ($a1 & 0xF0000000 != 0) a1 = 0
|-
|-
|0x2C|| Shin Onimusha - Dawn of Dreams Fix IPU DMA JPN((PlayStation 2 the Best)/US release.
|0x2C|| Shin Onimusha - Dawn of Dreams Fix ingame IPU runtime - JPN/US release [https://github.com/PCSX2/pcsx2/issues/1141 bug]
|-
|-
|0x2D|| Shin Onimusha - Dawn of Dreams Fix IPU DMA PAL release.
|0x2D|| Shin Onimusha - Dawn of Dreams Fix ingame IPU runtime - PAL release [https://github.com/PCSX2/pcsx2/issues/1141 bug]
|-
|-
|0x2E|| Shin Onimusha - Dawn of Dreams Fix IPU DMA Unk release. Code from emu match SLPM-66275 release. Why it is unused? Hook address will be 0x3BB4EC.
|0x2E|| Shin Onimusha - Dawn of Dreams Fix ingame IPU runtime - Unk release (SCKA-20086? SLPM-66275? Why it is unused? Why non PS2 Best JPN release is missing hook?)
|-
|-
|0x2F||
|0x2F||
  if value at EE Mem 0x37B0C4 == 0, set mips pc register (program counter) to 0x100B98
  condition [ 0x37B0C4 + 200000000 base ] == 0 -> 00 10 0B 98
Config is supposed to repeat chunk of code if EE mem 0x37BB0C == 0.
|-
|-
|0x30||
|0x30||
  if value at EE Mem 0x37B704 == 0, set mips pc register (program counter) to 0x100B98
  condition [ 0x37B704 + 200000000 base ] == 0 -> 00 10 0B 98
Config is supposed to repeat chunk of code if EE mem 0x37BB0C == 0.
|-
|-
|0x31||
|0x31||
  if value at EE Mem 0x37630C == 0, set mips pc register (program counter) to 0x100BA8
  condition [ 0x37630C + 200000000 base ] == 0 -> 00 10 0B A8
Config is supposed to repeat chunk of code if EE mem 0x37BB0C == 0.
|-
|-
|0x32||
|0x32||
  if value at EE Mem 0x37BB0C == 0, set mips pc register (program counter) to 0x100BA8.
  condition [ 0x37BB0C + 200000000 base ] == 0 -> 00 10 0B A8
Config is supposed to repeat chunk of code if EE mem 0x37BB0C == 0.
|-
|-
|0x33||  
|0x33||  
Line 2,074: Line 1,979:
|0x38||
|0x38||
|-
|-
|0x39|| Used silently in command 0x4B with first param from 0x4B as hook address. Hook seems to be unusable without 0x4B command, because there is no way to setup redirect mode and ID without 0x4B.
|0x39|| Used silently in command 0x4B with first param from 0x4B as hook address.
|-
|-
|0x3A|| Used silently in command 0x4C with first param from 0x4C as hook address. Hook seems to be unusable without 0x4C command, because there is no way to setup mode and ID without 0x4C.
|0x3A|| Used silently in command 0x4C with first param from 0x4C as hook address.
|-
|-
|0x3B|| Grand Theft Auto 3 (SLPM-55293 "Rockstar Classics")
|0x3B|| Grand Theft Auto 3 (JP/AS) ? using 0x351210, 0x18F590, 0x351568 ( + 200000000 base )
using 0x351210, 0x18F590, 0x351568 ( + 200000000 base )
0x351210 = start CTheScripts::ClearSpaceForMissionEntity((CVector const &, CEntity *))
0x18F590 = start CCollision::ProcessColModels((CMatrix const &, CColModel &, CMatrix const &, CColModel &, CColPoint *, CColPoint *, float *))
0x351568 = Almost end (only loading values preserved on stack) of CTheScripts::ClearSpaceForMissionEntity((CVector const &, CEntity *))  
|}
|}
</div>


{{Boxcomm|id=0x02|name=Unknown|data=1x int32}}
{{Boxcomm|id=0x02|name=Unknown|data=1x int32}}
Line 2,094: Line 1,994:


{{Boxcomm|id=0x03|name=Unknown|data=N/A}}
{{Boxcomm|id=0x03|name=Unknown|data=N/A}}
Skip r5900 CACHE IXIN/IHIN (Index/Hit invalidate) opcodes.
Sets something 0


{{Boxcomm|id=0x04|name=Unknown|data=1x uint32_t index (i*0x80, special 0x12345: 0x91a280?)}}  
{{Boxcomm|id=0x04|name=Unknown|data=1x uint32_t index (i*0x80, special 0x12345: 0x91a280?)}}  
Line 2,120: Line 2,020:
**1 [Dark Cloud] and [Dead Or Alive 2 Hardcore]
**1 [Dark Cloud] and [Dead Or Alive 2 Hardcore]


{{Boxcomm|id=0x0A|name=EE_INSN_REPLACE32|data=uint32_t count, <List> (<nowiki>mode | offset</nowiki>, original opcode, replace opcode)}}
{{Boxcomm|id=0x0A|name=EE_INSN_REPLACE32|data=uint32_t count, <List> (offset, original opcode, replace opcode)}}
Command present only in the ps2_netemu. Maximum List Count: 32. Mode is first 4 bits of address field (Xyyyyyyy), can be either 0, 1, or 2. All known examples use this command in 0 mode, and modes 1 and 2 are here just for documentation purposes.
Command present only in the ps2_netemu. Maximum List Count: 32
 
*Valid values found
*mode 0 - Replace 32 bit of EE memory. Params are EE offset, original opcode, replace opcode.
**1 [Deadly Strike]
*mode 1 - Write jr ra, li v0, xxxx to selected memory range. Params are EE memory start address, original opcode, u16 counter, u16 value for li, v0 xxxx
**2 [Dragon Force]
*mode 2 - NOP memory at selected range. Params: start address, end address, unused (can be anything, but is required to align config).
Problem: Original opcode validity check is performed before testing config for special cases. Thus making mode 2 almost inaccessible.<br>
Solution: We can patch that one line of code by the same 0x0A config. So if we want to nop region from 0x100000 to 0x100080, first we need to patch 0x100000 to 0x100080 opcode. So check will pass, "simple" as that.


{{Boxcomm|id=0x0B|name=MECHA_SET_PATCH|data=1x uint32_t count, <List> {sector id, offset, sizeof present opcodes, replace opcodes, original opcodes)}}
{{Boxcomm|id=0x0B|name=MECHA_SET_PATCH|data=1x uint32_t count, <List> {sector id, offset, sizeof present opcodes, replace opcodes, original opcodes)}}
Line 2,154: Line 2,051:


{{Boxcomm|id=0x0C|name=Unknown|data=1x (uint16_t, uint16_t)}}
{{Boxcomm|id=0x0C|name=Unknown|data=1x (uint16_t, uint16_t)}}
First param can be 0, 1, or 2. Second param in range of 0 and 0xFFFF. Second param is used only if first param == 1. Default values are (1, 0x1000) for PS2DVD, and (1, 0x400) for PS2CD and PS2CDDA.<br>
0/1/2,<0x63>
Other valid values for the second param (found in oficial configs ?): 0x180, 0x800


{{Boxcomm|id=0x0D|name=Unknown|data=1x int32}}
{{Boxcomm|id=0x0D|name=Unknown|data=1x int32}}
True/false. Default = 1
True/false. Default = 1
  0 = Skip some IOP related code responsible for check value from IOP SPE LS 0x2C0C0 (and skip panic if value is 0 or -1).
  0 = Skip some IOP related code responsible for check value from IOP SPE LS 0x2C0C0 (and skip panic if value is 0 or -1).
  Also skip write of value 0x80000000 to SPU Signal Notification 1 Register of IOP SPE.
  Also skip write of 0x80000000 to unknown place related to IOP memory (to 0x4005400C).


{{Boxcomm|id=0x0E|name=Improves ADD/SUB accuracy|data=1x int32}}
{{Boxcomm|id=0x0E|name=Improves ADD/SUB accuracy|data=1x int32}}
Line 2,191: Line 2,087:
  because at some point they are used to "andc" with first 4 bytes.
  because at some point they are used to "andc" with first 4 bytes.
  Some examples for first 4 bytes:
  Some examples for first 4 bytes:
  0x1000    = Run additional flag related code after every FMAC operation, VU0 only, COP2 do this by default.
  0x100000  = Different code path for VU0 opcodes that do ADD/SUB with multiply (MSUB, MADDA, etc.).  
0x2000    = Emit some additional code when lower opcode is fsset, this flag require 0x1000 to be enabled. VU0 only.
  0x200000  = Run some additional code in VU0 load/store opcodes (ILW, LQI, ISWR, etc.)
0x100000  = When enabled opcodes like MSUB, MADDA, etc, do proper multiply first, then add/sub. When disabled (default) single opcode is used (vmaddfp / vmmsubfp). Not used in COP2 mode.
              Note: When this command is disabled, then "Accurate MUL" is skipped for MADDxx/MSUBxx regardless that 0x30000000 is set or not.
              Because there is no way to do correct MUL separately when altivec madd/msub is used.
  0x200000  = Run some additional code in VU0 load/store opcodes (ILW, LQI, ISWR, etc.) Not used in COP2 mode.
  0x400000  = Skip emu syscall 3 (3)
  0x400000  = Skip emu syscall 3 (3)
  0x800000  = Skip emu syscall 3 (4)
  0x800000  = Skip emu syscall 3 (4)
  0x4000000  = Enable type 2 config from cmd 0x12.
  0x4000000  = This flag ensure that type 2 config from cmd 0x12 will run. Otherwise it seems to be skipped.  
  0x8000000  = Accurate VU0 DIV opcode, not used in COP2 mode.
  0x8000000  = Run some additional code for VU0 DIV opcode
  0x10000000 = Fast Accurate VU0 MUL. Try to round mantissa. Opcodes like MSUB/MADD additionally require 0x100000 to be enabled, otherwise command skip them. Not used in COP2 mode.
  0x30000000 = Different code path for VU0 MUL opcodes, include opcodes like MSUB for mul part. So 0x30100000 work for mul, and sub part.  
0x20000000 = Full Accurate VU0 MUL. Use runtime from CMD 0x10, but for every matching VU0 opcode, including opcodes like MSUB for mul part.
  0x10000000 and 0x20000000 also work for that purpose, emu just check for any active bits after applying 0x30000000 mask.
              Opcodes like MSUB/MADD additionally require 0x100000 to be enabled, otherwise command skip them.
   
Selecting both 0x10000000 and 0x20000000 (0x30000000) work the same way as 0x20000000.
  Keep in mind that you still need to use at least 8 bytes for cmd 0x12, just use 00 for bytes 5,6,7,8.  
  Keep in mind that you still need to use at least 8 bytes for cmd 0x12, just use 00 for bytes 5,6,7,8.  
  Later bits are dependent on which subcommand we want to run.
  Later bits are dependent on which subcommand we want to run.
Line 2,224: Line 2,113:


{{Boxcomm|id=0x15|name=Unknown|data=1 Param ( <1, >1 )}}
{{Boxcomm|id=0x15|name=Unknown|data=1 Param ( <1, >1 )}}
Patch SPE 0 (IOP) program in local memory. Command search for absolute branches in LS 0x3A2C0 - 0x3A6C0 and patch first branch that match to "bi r127". That weird approach was probably used because spe program differ little bit between emu versions, so they don't need to update command on every new emu revision. Currently (4.75+) this command patch branch at address 0x3A3A4 (bra sub_2E600). This command takes partially unused value. Value 0,1 do nothing, values 2 and above run command. Doesn't matter is 2,4, or 10. Nothing will change in command behavior.
Patch SPE 0 (IOP) program in local memory. Command search for absolute branches in LS 0x3A2C0 - 0x3A6C0 and patch them to bi r127. This command take partially unused value. Value 0,1 do nothing, values 2 and above run command. Doesn't matter is 2,4, or 10. Nothing will change in command behavior.
  [Aeon Flux] uses 2 (gxemu config)
  [Aeon Flux] uses 2 (gxemu config)
  [Bloodrayne 2] uses 4
  [Bloodrayne 2] uses 4
Line 2,287: Line 2,176:
{{Boxcomm|id=0x1F|name=Unknown|data=1x uint32_t}}
{{Boxcomm|id=0x1F|name=Unknown|data=1x uint32_t}}
Default 1
Default 1
  Make VIF0 commands MSCAL/MSCALF/MSCNT/MPG/FLUSHE non instant. By default every VIF0 command take 1 cycle, so it's instant.
  Config value is added to another value, and stored later in negmem. For sure this is VIF0 related command, and can be VIF0 timing/cycle related.
This config give vif0 some timing sense.
When delta from config passed and vpustat vu0 bits are non 0 (so practically if vif0 is still running),
add 500 cycles and go on until next event test before doing anything on vif0.
This can also be used to ensure that next vif0 command won't run until delta from config passed.
Value from config is added to current r5900 cycles and vif0 will do nothing unless current cycles match new value.
*Valid values found: 200d, 1000d


{{Boxcomm|id=0x20|name=Unknown|data=1x uint64_t}}
{{Boxcomm|id=0x20|name=Unknown|data=1x uint64_t}}
Line 2,300: Line 2,183:
  Is worth to note that 0x3C is default multiplier even for PAL titles, so is not stricly related to framerate,
  Is worth to note that 0x3C is default multiplier even for PAL titles, so is not stricly related to framerate,
  but to vsync counters (where 0x3C is still wrong anyway..). Result of multiply is also compared at some point to vsync delay value.  
  but to vsync counters (where 0x3C is still wrong anyway..). Result of multiply is also compared at some point to vsync delay value.  
*Valid values found: 10d, 60d, 100d, 120d, 200d, 240d


{{Boxcomm|id=0x21|name=Unknown|data=1x uint32_t}}
{{Boxcomm|id=0x21|name=Unknown|data=1x uint32_t}}
Option one default value = 1, when set to 0: r5900 CACHE opcode IXLTG store 0 in COP0 TagLo register. More than that recompiler skip function responsible for analyze and emitting costly iCache checks.
  0 = sets an option from 1 to 0 and another one to 0,
This drastically reduce emitted code size, and practically disable iCache emulation. Additionally CACHE IXIN/IHIN opcodes use different very long code path (this can be skipped with cmd 0x03).
  1 = sets an option from 1 to 0 and another one to 1,
Option two default value = 0, when set to 1: Emit some kind of check for current r5900 PC with possible trap (tw opcode) at the end. 1 is valid only when option one is 0.
  2 = sets an option from 1 to 1 and another one to 0
  0 = sets an option one to 0 and option two to 0
  1 = sets an option one to 0 and option two to 1
  2 = sets an option one to 1 and option two to 0 (default)
   [Fatal Frame II] uses 0
   [Fatal Frame II] uses 0
   [Grand Theft Auto Vice City] uses 1
   [Grand Theft Auto Vice City] uses 1
Line 2,323: Line 2,201:
{{Boxcomm|id=0x24|name=Unknown|data=1x uint64_t}}
{{Boxcomm|id=0x24|name=Unknown|data=1x uint64_t}}
SIO2 related
SIO2 related
*Valid values found: 12000d, 48000d
{{Boxcomm|id=0x25|name=N/A|data=N/A}}
{{Boxcomm|id=0x25|name=N/A|data=N/A}}
Command not available in ps2_netemu.self
Command not available in ps2_netemu.self
Line 2,349: Line 2,225:
{{Boxcomm|id=0x28|name=Unknown|data=1x uint32_t}}
{{Boxcomm|id=0x28|name=Unknown|data=1x uint32_t}}
<=3
<=3
*Valid values found: 0, 1, 2, 3


{{Boxcomm|id=0x29|name=Unknown|data=2x uint32_t}}
{{Boxcomm|id=0x29|name=Unknown|data=2x uint32_t}}
Seek time modifier. Exact values meaning is unknown for now, they are used as multiplier. First param affect fast seek time, second param affect full seek time. Default value is 0x1F40, 0xBB80 (8000, 48000). Config affect only CDVD N Command Seek, read command that "SeekToSector" is not affected.
Seek/read time? Maybe seek/read delay? Full/fast seek? Default value is 0x1F40, 0xBB80 (8000, 48000)


{{Boxcomm|id=0x2A|name=Unknown|data=N/A}}
{{Boxcomm|id=0x2A|name=Unknown|data=N/A}}
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{{Boxcomm|id=0x2E|name=Unknown|data=1x uint32_t}}
{{Boxcomm|id=0x2E|name=Unknown|data=1x uint32_t}}
*Valid values found: 0x172


{{Boxcomm|id=0x2F|name=Unknown|data=1x uint32_t}}
{{Boxcomm|id=0x2F|name=Unknown|data=1x uint32_t}}
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{{Boxcomm|id=0x3D|name=Config revision|data=1x uint32_t}}
{{Boxcomm|id=0x3D|name=Config revision|data=1x uint32_t}}
Used by debug menu to print config revision. While every official and unofficial config use it, command is not mandatory. Debug menu will just print '''None''' as a config revision if command is missing. Official configs use this as a kind of debugging info to know minimal required emu revision.
This command works as a restriction, the emulator loads the config contents '''only''' if the '''emulator revision''' is bigger than the '''config revision'''. See: [[PS2_Emulation#PS2 Emulator Types and Revisions|PS2 Emulator Types and Revisions]]<br>
The goal of this restriction is to prevent the emulator to load a config containing unsupported commands, as example netemu command 0x50 is only supported since netemu revision 17495 (shipped with PS3 firmware 4.78 or newer), otherway if you try to load a config with a revision higher than your netemu revision the contents of the config are going to be ignored (as example when trying to load a modern config using commands higher than 0x41 in a custom firmware 3.70)<br>
In general is better to use a low revision with this command to lower the restriction as most as posible (oldest netemu revision is 15686), but '''only''' if the commands inside the config are not higher than 0x41, for a reference when creating custom configs check the table below, those are the minimal '''config revisions''' required that depends of the config commands contents


{| class="wikitable" style="font-size:1em; line-height:1em"
{| class="wikitable" style="font-size:1em; line-height:1em"
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|-
|-
| Up to 0x41 || 15686 || 3.70 or newer
| Up to 0x41 || 15686 || 3.70 or newer
|-
| Unknown || 16040 || Unknown
|-
|-
| Up to 0x43 || 16604 || 4.20 or newer
| Up to 0x43 || 16604 || 4.20 or newer
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| Up to 0x50 || 17495 || 4.78 or newer
| Up to 0x50 || 17495 || 4.78 or newer
|}
|}
See: [[PS2_Emulation#PS2 Emulator Types and Revisions|PS2 Emulator Types and Revisions]]
 
*Problems:
**The [[PS2 Official Configs|official NET config]] for Gradius V (SLPM-62462) uses config revision = 17498 (is the highest value ever found in a official PS2 classic config), this value is higher than any retail ps2_netemu.self revision, and is breaking the logic of the [[Template:Ps2configrev]] (used to calculate the PS3 firmware version required by the config). So either... 1) the description of this command written above is not accurate enought, or 2) the config has been "faked" to an incorrect revision, or 3) the config is real but sony made a mistake with the revision and the emulator is not loading it


{{Boxcomm|id=0x3E|name=Unknown|data=N/A}}
{{Boxcomm|id=0x3E|name=Unknown|data=N/A}}
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{{Boxcomm|id=0x3F|name=Unknown|data=1x uint32_t}}
{{Boxcomm|id=0x3F|name=Unknown|data=1x uint32_t}}
Store value on 0x2B700 of SPE 0 (IOP) LS. SIF1 DMA related.
Store value on 0x2B700 of SPE 0 (IOP) LS.


{{Boxcomm|id=0x40|name=Unknown|data=N/A}}
{{Boxcomm|id=0x40|name=Unknown|data=N/A}}
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{{Boxcomm|id=0x42|name=EE Overlay patch|data=2 main Params + patch data: uint32_t address, uint32_t count, opcode,opcode,opcode...}}
{{Boxcomm|id=0x42|name=EE Overlay patch|data=2 main Params + patch data: uint32_t address, uint32_t count, opcode,opcode,opcode...}}
Applied on game start (more precisely while executing ps2 bios syscall 7 ExecPS2), if game overwrite selected part of memory, it will wipe 0x42 patch. See [[Special:Diff/67828/67858]]
Applied on game start, if game overwrite selected part of memory, it will wipe 0x42 patch. See [[Special:Diff/67828/67858]]
  Start address can be (in theory) anywhere, but Sony used the 0xFF000 - 0xFFFFC range for this purpose.
  Start address can be (in theory) anywhere, but Sony used the 0xFF000 - 0xFFFFC range for this purpose.
  Count is size of patch in 4 bytes opcodes. So 5 opcode patch = count 5.
  Count is size of patch in 4 bytes opcodes. So 5 opcode patch = count 5.
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{{Boxcomm|id=0x49|name=Unknown|data=N/A}}
{{Boxcomm|id=0x49|name=Unknown|data=N/A}}
Skip part of code which use GS XYOFFSET_1 register, possibly ignore it at all. 
Sets something 0xB,0,0
  Trapt
  Trapt


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  For proper config we need at least 2 (can be more if needed) 0x4B commands, one to enable redirect, one to disable.
  For proper config we need at least 2 (can be more if needed) 0x4B commands, one to enable redirect, one to disable.
  First param is EE memory offset that when is hit enable/disable redirection.
  First param is EE memory offset that when is hit enable/disable redirection.
  Second param is used to select which card will be redirected:
  Second param is partially unknown, seems to be size of next param to read * 4 (3 in known configs), or 0xFFFFFFFF for disable redirect command.
  0x00 do nothing
  0x01 for SCEVMC0.VME
  0x02 for SCEVMC1.VME
  0x03 for SCEVMC0.VME and SCEVMC1.VME
  0xFFFFFFFF to disable redirection, and use original VMEs.
  Third param is ID of SAVEDATA we want to use padded with 00 to match 12 bytes, or all 00 in disable redirect config.
  Third param is ID of SAVEDATA we want to use padded with 00 to match 12 bytes, or all 00 in disable redirect config.
  Important note here is that config have own 00 00 00 00 terminator at the end.  
  Important note here is that config have own 00 00 00 00 terminator at the end.  
  So after 12 bytes of ID we need to add 4 bytes of 00. That apply also to disable redirect version.
  So after 12 bytes of ID we need to add 4 bytes of 00. That apply also to disable redirect version.
Under the hood config also setup 0x01 hook commands with 0x39 subcommand on selected addresses.


{{Boxcomm|id=0x4C|name=Unknown|data=2x uint32_t + ID: offset, int, char[]}}
{{Boxcomm|id=0x4C|name=Unknown|data=2x uint32_t + ID: offset, int, char[]}}
Used to redirect to different ISO without game reset. First param is EE offset to hook, second param is some kind of mode selector, depending on that
Used to redirect to different ISO without game reset. First param is EE offset to hook, second param is ID size * 4. Emulator do some checks here, safe value is 3 (3 * 4 bytes), third value is ID in big endian hex ascii (eg. NPJD12345), additionally 0x4C expect own 00 00 00 00 terminator. To eventually end redirection use another 0x4C but with (offset, 0xFFFFFFFF, 4 * 0x00000000 . This config have very similar usage to 0x4B, just redirect to different iso, instead to different MC. Currently is unknown that cobra patched emulators support that config properly.
emulator later set mecha switch disc state:
  mode 0x01 = set disc switch state to 1 (on next mecha main loop it will emulate opening the tray).
  mode 0x02 = set disc switch state to 3.
  mode 0x03 = set disc switch state to 3. This state repeats because it work different way depending that emulated tray is closed or no.
  mode 0x04 = set disc switch state to 2.
  mode anything else = do nothing.
Third value is ID in big endian hex ascii (eg. NPJD12345), additionally 0x4C expect own 00 00 00 00 terminator. To eventually end redirection use  
another 0x4C but with (offset, 0xFFFFFFFF, 4 * 0x00000000 . This config have very similar usage to 0x4B, just redirect to different iso, instead to  
different MC. Currently is unknown that cobra patched emulators support that config properly, and swap disc thru 0x00 command seems to be easier.
This config don't work if 0x00 multidisc config is detected. Config under the hood setup 0x01 hooks with subcommand 0x3A


{{Boxcomm|id=0x4D|name=Unknown|data=1x uint32_t}}
{{Boxcomm|id=0x4D|name=Unknown|data=1x uint32_t}}
Param is floating point value. Default value 0.
Param is MASK used in some conversion of Q value in RGBAQ writes. Default value 0.
  if Q in GS RGBAQ write is 0.0 or -0.0 then
  tempQ = Q & 0x7FFFFFFF
    Q = Q | value from config
tempQ = tempQ & MASK
  else
  Q = tempQ | unmasked Q
    Q = Q
 
 
  Wild Arms: The Fifth Vanguard uses 0x3F800000
  Wild Arms: The Fifth Vanguard uses 0x3F800000 (1.0)


{{Boxcomm|id=0x4E|name=Unknown|data=Unknown}}
{{Boxcomm|id=0x4E|name=Unknown|data=Unknown}}
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! Bug !! Description !! Known Affected Games
! Bug !! Description !! Known Affected Games
|-
|-
| Missing Emotion Engine Data Cache emulation || Emulating that is literally not possible without making games run at 3 fps. Fixed by patches to game image, or EE code. Instruction Cache (not Data) seems to be implemented, at least partially. || Ice Age 2, DOA2: Extreme, Nascar 2009.
| Missing Emotion Engine Data Cache emulation || Emulating that is literally not possible without making games run at 3 fps. Fixed by patches to game image, or EE code. Only known game that need Instruction Cache (not Data) seems to work fine, but this not necessarily mean that emu support I Cache emulation. Mentioned game is WRC4, and there are possible other bugs that allow it to run (not invalidating recompiler block). || Ice Age 2, DOA2: Extreme, Nascar 2009.
|-
|-
| Branch delay slot violation not supported on EE || Some games have Branch instruction inside Branch delay slots, this is not emulated correctly on EE (VU have proper emulation of that). This is patched in configs by rearangging MIPS code. || WRC 3,4,Rally Evolved, one of Action Replay discs.   
| Branch delay slot violation not supported on EE || Some games have Branch instruction inside Branch delay slots, this is not emulated correctly on EE (VU have proper emulation of that). This is patched in configs by rearangging MIPS code. || WRC 3,4,Rally Evolved, one of Action Replay discs.   
|-
| Unmapped write only EE memory (confirmed only for SIF) || Reads/Writes to 0x2000000+ shouldn't throw bus error on dma transfers. Write should be performed as successful, memory should stay unchanged. Reads should return 0. || Games developed by In Utero, while creating initial save file, send DMA where address is EE stack pointer. At the time of transfer start $sp is too high, and requested transfer size make MADR overflow above 0x2000000 at some point. This is game bug, and happen also on real hardware. Fixed by config.
|-
|-
| VIF bugs || There is no correct timing, and queuing for some VIF commands like MSCAL. || Snowblind Engine games. Probably more.  
| VIF bugs || There is no correct timing, and queuing for some VIF commands like MSCAL. || Snowblind Engine games. Probably more.  
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| COP2 instructions are instant || Some games rely on fact that COP2 operations can take some time, on PS3 emulators they are done instantly due to lack of correctly emulated pipeline Patched by rearranging mips code || FFX, FFX-2, Ghost in The Shell SAC, Ace Combat series, Sprint Cars 1/2, Black, Run Like Hell, Everblue 2, Dragon Quest - Shounen Yangus no Fushigi na Daibouken, and many more
| COP2 instructions are instant || Some games rely on fact that COP2 operations can take some time, on PS3 emulators they are done instantly due to lack of correctly emulated pipeline Patched by rearranging mips code || FFX, FFX-2, Ghost in The Shell SAC, Ace Combat series, Sprint Cars 1/2, Black, Run Like Hell, Everblue 2, Dragon Quest - Shounen Yangus no Fushigi na Daibouken, and many more
|-
|-
| VU0 is not running in sync with EE core || VU0 is running program "at once", which mean that VU0 run until it hits E bit. From EE perspective it looks like whole VU0 program run in 1 cycle. Games that expect VU0 registers to be changed from EE side while VU0 is running are broken due to that. Partially resolved using 0x12 command with 2/3 subcommands, or by code rearranging.|| 24 The Game, ATV Quad Power Racing 2, Twisted Metal Head-On, Primal, Ghosthunter, Rayman Arena, Rayman 3, Largo winch. All games using M-bit.
| VU0 is not running in sync with EE core || Seems like old pcsx2 mVU approach is used where VU0 is running thousands of cycles ahead of EE. Partially resolved on emu using 0x12 command with 2/3 subcommands. || 24 The Game, ATV Quad Power Racing 2, Twisted Metal Head-On, Primal, Ghosthunter, Rayman Arena, Rayman 3, All games using M-bit.  
|-
| M-Bit not supported || Emulator ignore VU0 M-Bit, that cause issues for games that need it to work correctly. This is done because there is no way to sync correctly running VU0 without sync with EE. Partially resolved on emu using 0x12 command with 2/3 subcommands, or direct VU0/MIPS code rearranging. || Totally Spies! Totally Party, Mike Tyson Heavyweight Boxing, My Street, Crash Twinsanity, Marvel Nemesis, Panzer Elite Action - Fields of Glory, TriAce games (speed optimizations only), Super Monkey Ball Adventure, most Eko Software games, and many more.
|-
|-
| T-Bit not supported on VU0 || Emulator ignore VU0 T-Bit, that cause issues for games that need it to work. Note: T-Bit is correctly handled for VU1. || Spiderman 3 set T-Bit, then do cfc2 from TPC (address where VU0 stopped). Since T-Bit is ignored, TPC is wrong. Value is later copied to CMSAR0, and program continue at wrong address. Well that's what should happen, but T-Bit also not signalize correct bit in VPU-STAT. Causing another issue, also in Spiderman 3.  
| M-Bit not supported || Emulator ignore VU0 M-Bit, that cause issues for games that need it to work correctly. This is done because there is no way to sync correctly running VU0 without sync with EE. Partially resolved on emu using 0x12 command with 2/3 subcommands. || Totally Spies! Totally Party, Mike Tyson Heavyweight Boxing, My Street, Crash Twinsanity, Marvel Nemesis, Panzer Elite Action - Fields of Glory, TriAce games (speed optimizations only), Super Monkey Ball Adventure, most Eko Software games, and many more.
|-
|-
| Emulator do not update correct flag instances for COP2 while ending VU0 program on Ebit || This cause few games to read bad flag status (not status flag!) on COP2. This is resolved on emu by forcing update of MAC flag on every STATUS flag read (by config 0x12), this cause slowdowns creating a lot of unnecessary operations. || Driving Emotion Type-S, State of Emergency 2, The Getaway Black Monday.
| Emulator Fail to save correct flag instances while ending VU0 program on Ebit || This cause few games to read bad flag status (not status flag!) on COP2. This is resolved on emu by forcing update of MAC flag on every STATUS flag read (by config 0x12), this cause slowdowns creating a lot of unnesessary operations. || Driving Emotion Type-S, State of Emergency 2, The Getaway Black Monday.
|-
|-
| Not updated status flag when VDIV/VSQRT/VRSQRT is done on COP2 || Potential bad flag state can cause a lot of issues that are not related on first sight || Yanya Caballista (already patched by custom config)
| Not updated status flag when VDIV/VSQRT/VRSQRT is done on COP2 || Potential bad flag state can cause a lot of issues that are not related on first sight || Yanya Caballista (already patched by custom config)
|-
|-
| In corner cases emu select wrong block flags pipeline state (both VU0/EEonBE and VU1/VRC affected). || This can cause various issues, mostly SPS, missing graphic, specific slowdowns, etc. Issue seems to occur when branch/jump delay slot have opcode important for flags calculation. Theory is that cached microprogram don't include modified flags state from delay slot instruction. So when already recompiled program is fetched from pool, it will miss one cycle in fmac flags pipeline. This can be crucial in games that rely on it. || Tales of Legendia and Klonoa 2 set sticky flag bits to 0 and branch with sub.xyzw in delay slot (expecting that sub change status flag), Tamsoft engine games set sticky bits to 0 in branch delay slot, this was most ridiculous bug, because problematic branch was pointing to next opcode after delay slot, removing branch was enough. True Crime: NY is only known game where VU0 is affected by this bug. more..
| In corner cases emu select wrong block pipeline state while processing Flag VU opcodes. || This can cause various issues, mostly SPS, missing graphic, specific slowdowns, etc. For now it was only confirmed that FSAND opcode don't ask for exact pipeline state, but looking at assembly of other opcode this rather affect all of them. || Tales of Legendia, more..
|-
|-
| CTC2 opcode write whole value to R register, while only 23 bits are writable. Rest is hardcoded to 0x3F800000. || Can cause many weird issues like broken physics, broken graphics. PCSX2 was also affected [[https://github.com/PCSX2/pcsx2/pull/6611 more]]. || The one game that is known to be affected, and is already patched, is Musashi: Samurai Legend.
| CTC2 opcode write whole value to R register, while only 23 bits are writable. Rest is hardcoded to 0x3F800000. || Can cause many weird issues like broken physics, broken graphics. PCSX2 was also affected [[https://github.com/PCSX2/pcsx2/pull/6611 more]]. || There is only one game that is known to be affected, and is already partially patched (patch still break fog), is Musashi Samurai Legend.
|-
|-
| CFC2 from R register should return only 23 lower bits. || CFC2 from R on real PS2 return only lower 23 bits. Originally found out by PCSX2 team  [[https://github.com/PCSX2/pcsx2/pull/8409 more]] and later confirmed to affect ps2_netemu in emu assembly. || There is only one game that is known to be affected, Onimusha Dawn of Dreams.
|-
| Missing floating point result overflow/underflow detection (U/O flags not set) || Since this affect all units (FPU/VU), many issues can occur. But in reality it seems to not affect any games. While this is easier to implement than on x86 system (full floats range, compared to ieee754), there is no way to do that by hardware way. Because SPU add/sub don't set those flags on single precision operations, and vmx have them disabled in spu compatibility mode. || Superman Returns.
|-
| DMA between SPR and VU1 memory cause emulator panic. || Currently cause is unknown. It seems that functions responsible for transfer don't check that VU is running. Manual state that dma can be performed only when VU is not active, and pcsx2 wait until VU end. Games affected in emulators on ps3 display this warning in pcsx2 if mtvu is enabled: "MTVU: SPR Accessing VU1 Memory". Affected games are fixed by rearranging code to do lq/sq loop instead of DMA. || Summoner 2 (SPRfrom to VU1 data mem), Kaena (SPRto from VU1 data mem).
|-
| IOP SIF0/1 DMA IRQs can be disabled (masked), which is not true on real hardware. || IOP interrupts 0x2A and 0x2B should always trigger. Fixed by patches to IOP code. Ps2_emu seems to be unfacted, probably handled on real hw in CXD9208GP. || Knockout Kings 2001, DOA2: Hardcore.
|}
|}
===Software emulation bugs===
===Software emulation bugs===
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! Bug !! Description !! Known Affected Games
! Bug !! Description !! Known Affected Games
|-
|-
| No mipmapping support || Emulator does ignore the mipmap layers, probably for performance reasons. It is processing only the level 0 texture base pointer specified in the TEX0 register. There are games writing garbage data into that memory area, when the mipmap level is different than zero. As a result, a garbled texture is shown instead of a correct one. || Ace Combat series, Ape Escape 2, EA Sports F1 series, Harry Potter series, ICO (psuedo volumetric rays), Jak and Daxter series, Nickelodeon Barnyard and Nicktoons Unite (very strange implementation), Ratchet and Clank series and more.
| No mipmapping support || Emulator does ignore the mipmap layers, probably for performance reasons. It is processing only the level 0 texture base pointer specified in the TEX0 register. There are games writing a garbage data into that memory area, when the mipmap level is different than zero. As a result, a garbled texture is shown instead of a correct one. || Ace Combat series, Ape Escape 2, EA Sports F1 series, Harry Potter series, ICO (psuedo volumetric rays), Jak and Daxter series, Nickelodeon Barnyard and Nicktoons Unite (very strange implementation), Ratchet and Clank series and more.
|-
| SCANMSK register ignored || Emulator does ignore the SCANMSK setting responsible for restricting the drawing primitives on the odd or even lines. It is used as a fake transparency effect in some games by merging the two display circuits. || Metal Gear Solid series (water and reflection effects), Gran Turismo series (ghost cars), Raw Danger! (depth of field effect)
|-
|-
| Missing PCRTC feedback write support || PCRTC feature that writes back the image to the frame buffer is not supported or broken. Additional RGB to YCbCr conversion could be performed there. || Xenosaga Episode I: Der Wille zur Macht (black and white cut scenes)
| SCANMSK register ignored || Emulator does ignore the SCANMSK setting responsible for restricting the drawing primitives on the odd or even lines. It is used as a fake transparency effect in some games by merging the two display circuits. || Metal Gear Solid series (heavy used in the MGS2 on the water and reflection effects), Gran Turismo series (ghost cars), Raw Danger! (depth of field/tonemapping effect)
|-
|-
|}
|}
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* http://wiki.pcsx2.net/index.php/Category:Software_rendering_only_games
* http://wiki.pcsx2.net/index.php/Category:Software_rendering_only_games


{{Reverse engineering}}<noinclude>
{{Reverse engineering}}<noinclude>[[Category:Main]]</noinclude>
[[Category:Main]]
</noinclude>
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