Editing Talk:Motherboard Revisions Nonretail

Jump to navigation Jump to search
Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.

The edit can be undone. Please check the comparison below to verify that this is what you want to do, and then publish the changes below to finish undoing the edit.

Latest revision Your text
Line 1: Line 1:
==Motherboard BE-28 (1-876-411-12)==
==Motherboard BC-Z0==
*Used in Sony Zego BCU-100<br/>
*Used in Sony Zego BCU-100<br/>
*Based on TMU-520<br/>
*Looks almost exactly like the TMU-520<br/>
<b>CELL</b>: CXD2989AGB-3 (8 SPE's)<br/>
<b>Serial</b>: 1-876-411-12<br/>
<b>XDR</b>: EDX5116ADSE-3C-E (x16+2) 1GB +ECC<br/>
<b>CPU</b>: CELL BE 3.2 GHz (8x SPE, 1x PPE)<br/>
<br/>
<b>GPU</b>: Nvidia RSX (256MB VRAM)<br/>
<b>RSX</b>: CXD2982BGB-1<br/>
<b>RAM</b>: 8x 128Mb Rambus XDR ECC Memory<br/>
<b>DVI</b>: SII1178CSU + ADV7123JSTZ240<br/>
<b>South Bridge</b>: Sony SCC (Super Companion Chip) with 1GB DDR2-333 SDRAM<br/>
<br/>
<b>North Bridge</b>: Integrated into CELL BE<br/>
<b>SB</b>: T9MA7XBQ (CXD2973AGB-4)<br/>
<b>SysCon</b>: ? <!-- located on the upper left side of the MB if you look from the front--><br/>
<b>DDR2</b>: EDE5108AJSE-6E-E (x8) 1GB<br/>
<b>Interfaces</b>: 1x 4-lane PCI-Express, 1x SATA, 1x ATA<br/>
<br/>
<b>Ports</b>: 2x Gigabit Ethernet, 3x USB 2.0, 1x RS-323 (Maintenance Port)<br/>
<b>GbE</b>: 88E1011-BAB1<br/>
<b>GbE 2</b>: LU82541PI + M93C46-WDW6TP 1Kb EEPROM<br/>
<b>USB</b>: UPD720114GA-9EU-A<br/>
<b>1394</b>: TSB41AB2PAP<br/>
<b>SATA</b>: 88SA8040C0-TBC1C000 (x2)<br/>
<br/>
<b>NOR</b>: S29GL512N10TFI020-BE28V01 64MB<br/>
<b>NVRAM</b>: STK14CA8-NF45-B 128KB<br/>
<b>SS2</b>: GBDriver XR2A<br/>
<b>NAND</b>: K9F2G08U0M-PIB0T (x2) 512MB<br/>
<br/>
<b>SC</b>: R5F70845AN80FPV µC + EP1C12F324C8N FPGA + IDT71V416S12PHG-TL 512KB SRAM + M24256-BWMN6TP (x2) 64MB EEPROM + RV5C387A RTC<br/>
 
*https://www.sony.jp/pro/products/BCU-100/index.html
*https://www.sony.jp/products/picture/BCU-100.jpg
*https://www.sony.jp/products/picture/BCU-100_001.jpg
*https://www.sony.jp/products/picture/BCU-100_002.jpg
*https://www.sony.jp/products/picture/BCU-100_003.jpg
*https://www.sony.jp/products/picture/BCU-100_004.jpg
 
*https://www.sony.jp/products/catalog/SPC_BCU-100.pdf
*https://www.sony.jp/products/catalog/FUN_BCU-100.pdf
*https://www.manualslib.com/products/Sony-Bcu-100-10661523.html


==Misc Motherboards==
==Misc Motherboards==
Please note that all contributions to PS3 Developer wiki are considered to be released under the GNU Free Documentation License 1.2 (see PS3 Developer wiki:Copyrights for details). If you do not want your writing to be edited mercilessly and redistributed at will, then do not submit it here.
You are also promising us that you wrote this yourself, or copied it from a public domain or similar free resource. Do not submit copyrighted work without permission!

To protect the wiki against automated edit spam, we kindly ask you to solve the following hCaptcha:

Cancel Editing help (opens in new window)