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Revision as of 21:53, 7 February 2012
Main System Memory
The PS3 has 256MB of 64 bit bus Rambus XDR main system memory. Some models use four 64MB Samsung chips, while other models uses four 64MB Elpida chips.
A sample of the Memory chips in different PS3 models:
Type | Size | Speed | Voltage | Packaging | Manufact. | Serial Number | Amount | Models |
---|---|---|---|---|---|---|---|---|
Rambus XDR | 64MB | 400MHz | 1.8V+/-0.09V | FBGA-104 | Elpida | X5116AC-SE-3C-E | 4x | CECHA/COK-001 up to including CECHG/SEM-001 |
Rambus XDR | 64MB | 400MHz | 1.8V+/-0.09V | FBGA-104 | Samsung | K4Y50164UC-JCB3 | 4x | ?Some initial models? |
Rambus XDR | 64MB | 400MHz | 1.8V+/-0.09V | FBGA-100 | Samsung | K4Y50164UE-JCB3 | 4x | CECHJ/DIA-002 and CECHK/DIA-002 |
Rambus XDR | 64MB | 400MHz | 1.8V+/-0.09V | FBGA-104 | Elpida | X5116ADSE-3C-E | 4x | CECHH/DIA-001, CECHL/VER-001 up and including CECHQ/VER-001 and PS3 Slim CECH-20..A/DYN-001 |
Rambus XDR | 128MB | 400MHz | 1.5V+/-0.075V | FBGA-150 | Elpida | X1032BASE-3C-F | 2x | CECH-21..A/SUR-001 |
Elpida X5116AC-SE-3C-E
Datasheet: Elpida X5116AC-SE-3C-E
productcode meaning: E - Elpida Memory D - Type : Monolithic Device X - Product Family : XDR RAM 51 - Density : 512M (x16bit) 16 - Organisation : x16bit A - Supply Voltage : 1.8V, DRSL C - Die Revision: C SE - Package : FBGA (with back cover) - 3C - Speed : 3.2G (tRAC = 35, C Bin) - E - Environmental Code : Lead Free
Samsung K4Y50164UC-JCB3
Datasheet: Samsung K4Y50164UC-JCB3
productcode meaning: K - Samsung Memory 4 - DRAM Y - Product : XDR RAM 50 - Density : 512M, 32K/16ms(0,49us) 16 - Organisation : x16 4 - Banks : 8 U - Interface : DRSL(1.8V, 1.2V) C - Generation : 4th - J - Packagetype: BOC lead free C - Temperature & Power: Commercial, Normal Power B3 - Speed (Data frequency, tRAC, tRC) : 3.2Gbps, 35ns, 24cycles
Samsung K4Y50164UE-JCB3
(CECHG,CECHK)
Datasheet: Samsung K4Y50164UE-JCB3
productcode meaning: K - Samsung Memory 4 - DRAM Y - Product : XDR RAM 50 - Density : 512M, 32K/16ms(0,49us) 16 - Organisation : x16 4 - Banks : 8 U - Interface : DRSL(1.8V, 1.2V) E - Generation : 6th - J - Packagetype: BOC lead free C - Temperature & Power: Commercial, Normal Power B3 - Speed (Data frequency, tRAC, tRC) : 3.2Gbps, 35ns, 24cycles
Elpida X5116ADSE-3C-E
(CECH-20xx)
Datasheet: Elpida X5116ADSE-3C-E
productcode meaning: X - Product Family : XDR RAM 51 - Density : 512M (x16bit) 16 - Organisation : x16bit A - Supply Voltage : 1.8V, DRSL D - Die Revision: D SE - Package : FBGA (with back cover) - 3C - Speed : 3.2G (tRAC = 35, C Bin) - E - Environmental Code : Lead Free
Elpida X1032BASE-3C-F
(CECH-21xx and later)
Datasheet: E1332E50 (EOL)
productcode meaning: E - Elpida Memory D - Type : Monolithic Device X - Product Family : XDR RAM 13 - Density : 1Gbit (128MB) 32Mbitx32 32 - Organisation : x32bit B - Supply Voltage : 1.5V +/- 0.075V, DRSL A - Die Revision: A SE - Package : FBGA (with back cover) - 3C - Speed : 3.2G (tRAC = 35, C Bin) - F - Environmental Code : Lead & Halogen Free
Graphics Memory
The 256MB of GDDR3 memory is located inside the RSX chip using four 64MB FBGA chips.
Type | Size | Speed | Voltage | Packaging | Manufacturer | Serial Number | Description |
---|---|---|---|---|---|---|---|
GDDR3 | 64MB (512Mbit) | 700MHz | 2.0V +/-0.1V | Samsung | K4J52324QC-SC14 | 256MB total (4 chips) for PS3 Graphics Memory | |
GDDR3 | 64MB (512Mbit) | 700MHz | 2.0V +/-0.1V | Qimonda | HYB18H512322AF-14 | 256MB total (4 chips) for PS3 Graphics Memory (later models) |
Samsung K4J52324QC-SC14
Datasheet: Samsung K4J52324QC-SC14
productcode meaning: K - Samsung Memory 4 - DRAM J - Product : GDDR3 RAM 52 - Density : 512M, 32ms, 8K 32 - Organisation : x32 4 - Banks : 8 Q - Interface : DRSL(1.8V, 1.2V) C - Generation : 4th - S - Packagetype: BOC lead C - Temperature & Power: Commercial, Normal Power (1.8V +/- 0.1V) 14 - Speed (Data frequency, tRAC, tRC) : 1.4Gbps
Qimonda HYB18H512322AF-14
datasheet: unavailable
productcode meaning: H Y B 1 8 H 512 - Density : 512M (16M x 32) 32 - Organisation : x32 2 A F - 14- Speed (Data frequency, tRAC, tRC) : 1.4Gbps
Other XDR Rambus references
- CellBE_HIG_65nm_v1.01_8Jun2007.pdf
- BE_Hardwar_Init_Guide_v1.3_31March2006.pdf
- Rambus XDR IO Cell (XIO) - dl_0362_v0_71.pdf
- XDR Architecture - Rambus dl_0161_v0_8.pdf
- 8x4Mx16/8/4/2 - Rambus xdr_dl_0476.pdf
- XDR Clock Generator - Rambus dl_0169l_v0_81.pdf
- dl_0178_v0_93.pdf (january 2006)
- dl_0178_v0_95.pdf (august 2006)
PS2 Compatibility Memory
See: PS2 Compatibility