Talk:SW2-303: Difference between revisions

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== 1 wire uart comms ==
== 1 wire uart comms ==


c5 command response
=== uart protocol for flash programming ===
 
<pre>
01 - soh = start of heading(command sending to chip)
01 - soh = start of heading(command sending to chip)


Line 10: Line 10:


03 - etx = end of text/end transmission(marker for end of reply from chip/end of command data sent to chip)
03 - etx = end of text/end transmission(marker for end of reply from chip/end of command data sent to chip)
</pre>


format of messaging
format of messaging


<pre>
<stx/soh><length><command/error><data><checksum><etx>
<stx/soh><length><command/error><data><checksum><etx>
</pre>


=== checksum ===  
=== checksum ===  
Command frame: LEN + COM + all of command information   
Command frame: LEN + COM + all of command information   


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=== get version cmd ===
=== get version cmd ===


<pre>
01 01 c5 3a 03 = get version c5
01 01 c5 3a 03 = get version c5


Line 43: Line 48:


FV3: Second decimal place of firmware version
FV3: Second decimal place of firmware version
</pre>
=== verify? 0x14 cmd ===
<pre>
01 01 14 eb 03 = 14 verify flash?
02 01 10 ef 03 = 10 protection error
</pre>
=== blank block check cmd ===
<pre>
01 08 32 00 00 00 0b ff ff 00 bd 03 = blank block check
SAH, SAM, SAL: Block blank check start address (start address of any block) 
SAH: Start address, high (bits 23 to 16) 
SAM: Start address, middle (bits 15 to 8) 
SAL: Start address, low (bits 7 to 0) 
EAH, EAM, EAL: Block blank check end address (last address of any block) 
EAH: End address, high (bits 23 to 16) 
EAM: End address, middle (bits 15 to 8) 
EAL: End address, low (bits 7 to 0) 
D01: 00H: When performing a block blank check for a single block  01H: When performing a blank check for the complete area before erasing the chip
start address:0x000000
end address:0x0bffff
d01:00 = single block
reply
02 01 1b e4 03
0x1b = 1BH MRG11 error Internal verify error or blank check error during data write
</pre>
=== chip erase cmd ===
<pre>
01 01 20 df 03 = chip erase
reply
02 01 10 ef 03 = protection error
</pre>
=== trace.log ===
<pre>
Send 3875590139 00CC 0001 01
Recv 3875590432 00CC 0001 01
Send 3875590441 0001 0001 20
Recv 3875590853 0001 0009 0022071F0022021600
Send 3875590856 00CC 0001 00
Recv 3875591193 00CC 0001 00
Send 3876254819 00CC 0001 01
Recv 3876255072 00CC 0001 01
Send 3876255075 0001 0001 21
Recv 3876255312 0001 0002 0000
Send 3876255314 00CC 0001 00
Recv 3876255543 00CC 0001 00
  0000000000 --- Command start.
Send 3877558552 00CC 0001 00
Recv 3877559043 00CC 0001 00
Send 3877559049 00CC 0007 01
Recv 3877559325 00CC 0007 01
Send 3877559330 00CC 0001 01
Recv 3877559548 00CC 0001 01
Send 3877559554 0001 0002 1002
Recv 3877559792 0001 0001 00
Send 3877559796 0001 0002 1400
Recv 3877560095 0001 0001 00
Send 3877560099 0001 0003 110100
Recv 3877560417 0001 0001 00
Send 3877560438 0001 0021 1500030D40000007D0000186A0000007
                        80002DC6C00000000900002710000028
                        3C
Recv 3877560669 0001 0001 00
Send 3877560672 0001 0002 1600
Recv 3877793598 0001 0001 00
Send 3877804081 0002 000D 01 0005 01 0002DC6C
              010100FF03
Recv 3877815207 0002 0008 01 0005
              020106F903
Send 3877815826 0002 000F 00 01 00000000
              01059A00000A015603
Send 3877815935 0001 0002 120A
Recv 3877826379 0001 0001 00
Send 3877836466 0002 000D 01 0005 01 0002DC6C
              010100FF03
Recv 3877837688 0002 0008 01 0005
              020106F903
Send 3877838296 0002 0013 02 0005 001C 02 002DC6C0 002DC6C0
              0101C03F03
Recv 3877839551 0002 0008 01 0005
              020106F903
Recv 3877842247 0002 001F 01 001C
              0218107F04DCFDFFFF0B443738463131
              42422020F8010000017FDB03
Send 3877842309 0001 0002 1900
Recv 3877852699 0001 0001 00
Send 3877852704 00CC 0001 00
Recv 3877852937 00CC 0001 00
Send 3878540213 00CC 0001 00
Recv 3878540701 00CC 0001 00
Send 3878540703 00CC 0001 00
Recv 3878540953 00CC 0001 00
</pre>

Latest revision as of 21:03, 18 September 2018

µPD78F11BB

1 wire uart comms[edit source]

uart protocol for flash programming[edit source]

01 - soh = start of heading(command sending to chip)

02 - stx = start of text/start transmission(marker for start of reply from chip)

03 - etx = end of text/end transmission(marker for end of reply from chip/end of command data sent to chip)

format of messaging

<stx/soh><length><command/error><data><checksum><etx>

checksum[edit source]

Command frame: LEN + COM + all of command information

Data frame: LEN + all of data

get version cmd[edit source]

01 01 c5 3a 03 = get version c5

02 01 06 f9 03 = ack response

02 06 00 00 00 01 00 00 f9 03 = 00 00 00 01 00 00

device version:0.00

firmware version: 1.00

DV1: Integer of device version (fixed to 00H)  

DV2: First decimal place of device version (fixed to 00H)  

DV3: Second decimal place of device version (fixed to 00H)  

FV1: Integer of firmware version   

FV2: First decimal place of firmware version  

FV3: Second decimal place of firmware version

verify? 0x14 cmd[edit source]

01 01 14 eb 03 = 14 verify flash? 

02 01 10 ef 03 = 10 protection error

blank block check cmd[edit source]

01 08 32 00 00 00 0b ff ff 00 bd 03 = blank block check

SAH, SAM, SAL: Block blank check start address (start address of any block)   

	SAH: Start address, high (bits 23 to 16)   

	SAM: Start address, middle (bits 15 to 8)   

	SAL: Start address, low (bits 7 to 0)  

EAH, EAM, EAL: Block blank check end address (last address of any block)  
 
	EAH: End address, high (bits 23 to 16)   

	EAM: End address, middle (bits 15 to 8)   

	EAL: End address, low (bits 7 to 0)  

	D01: 00H: When performing a block blank check for a single block   01H: When performing a blank check for the complete area before erasing the chip 


start address:0x000000

end address:0x0bffff

d01:00	= single block

reply

02 01 1b e4 03

0x1b = 1BH MRG11 error Internal verify error or blank check error during data write

chip erase cmd[edit source]

01 01 20 df 03 = chip erase

reply 

02 01 10 ef 03 = protection error

trace.log[edit source]

Send 3875590139 00CC 0001 01
Recv 3875590432 00CC 0001 01
Send 3875590441 0001 0001 20
Recv 3875590853 0001 0009 0022071F0022021600
Send 3875590856 00CC 0001 00
Recv 3875591193 00CC 0001 00
Send 3876254819 00CC 0001 01
Recv 3876255072 00CC 0001 01
Send 3876255075 0001 0001 21
Recv 3876255312 0001 0002 0000
Send 3876255314 00CC 0001 00
Recv 3876255543 00CC 0001 00
  0000000000 --- Command start.
Send 3877558552 00CC 0001 00
Recv 3877559043 00CC 0001 00
Send 3877559049 00CC 0007 01
Recv 3877559325 00CC 0007 01
Send 3877559330 00CC 0001 01
Recv 3877559548 00CC 0001 01
Send 3877559554 0001 0002 1002
Recv 3877559792 0001 0001 00
Send 3877559796 0001 0002 1400
Recv 3877560095 0001 0001 00
Send 3877560099 0001 0003 110100
Recv 3877560417 0001 0001 00
Send 3877560438 0001 0021 1500030D40000007D0000186A0000007
                        80002DC6C00000000900002710000028
                        3C
Recv 3877560669 0001 0001 00
Send 3877560672 0001 0002 1600
Recv 3877793598 0001 0001 00
Send 3877804081 0002 000D 01 0005 01 0002DC6C
              010100FF03
Recv 3877815207 0002 0008 01 0005
              020106F903
Send 3877815826 0002 000F 00 01 00000000
              01059A00000A015603
Send 3877815935 0001 0002 120A
Recv 3877826379 0001 0001 00
Send 3877836466 0002 000D 01 0005 01 0002DC6C
              010100FF03
Recv 3877837688 0002 0008 01 0005
              020106F903
Send 3877838296 0002 0013 02 0005 001C 02 002DC6C0 002DC6C0
              0101C03F03
Recv 3877839551 0002 0008 01 0005
              020106F903
Recv 3877842247 0002 001F 01 001C
              0218107F04DCFDFFFF0B443738463131
              42422020F8010000017FDB03
Send 3877842309 0001 0002 1900
Recv 3877852699 0001 0001 00
Send 3877852704 00CC 0001 00
Recv 3877852937 00CC 0001 00
Send 3878540213 00CC 0001 00
Recv 3878540701 00CC 0001 00
Send 3878540703 00CC 0001 00
Recv 3878540953 00CC 0001 00