Template:Samsung memory product code: Difference between revisions
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| '''50''': 512M, 32K/16ms<br />'''52''': 512M, 8K/32ms<br />'''12''': ? | | '''50''': 512M, 32K/16ms<br />'''52''': 512M, 8K/32ms<br />'''12''': ? | ||
| '''16''': x16bit<br />'''32''': x32bit | | '''16''': x16bit<br />'''32''': x32bit | ||
| '''4''': 8 Banks | | '''4''': 8 Banks<br />'''5''': 16 Banks | ||
| '''U''': DRSL, 1.8V, 1.2V<br>'''Q''': SSTL-2 1.8V, 1.8V<br>'''K''': ?<br>'''T''': ? | | '''U''': DRSL, 1.8V, 1.2V<br>'''Q''': SSTL-2 1.8V, 1.8V<br>'''K''': ?<br>'''T''': ? | ||
| '''C''': 4th Gen.<br />'''E''': 6th Gen.<br />'''I''': 10th Gen.<br />'''J''': 11th Gen. | | '''C''': 4th Gen.<br />'''E''': 6th Gen.<br />'''I''': 10th Gen.<br />'''J''': 11th Gen. | ||
Revision as of 14:59, 11 February 2023
| Manufacturer | DRAM | DRAM type | Density | Organization | Banks | Interface | Revision | Package type | Power & Temp. | Speed |
|---|---|---|---|---|---|---|---|---|---|---|
| K: Samsung | 4: DRAM | J: GDDR3 SDRAM Y: XDR DRAM G: GDDR5 SDRAM |
50: 512M, 32K/16ms 52: 512M, 8K/32ms 12: ? |
16: x16bit 32: x32bit |
4: 8 Banks 5: 16 Banks |
U: DRSL, 1.8V, 1.2V Q: SSTL-2 1.8V, 1.8V K: ? T: ? |
C: 4th Gen. E: 6th Gen. I: 10th Gen. J: 11th Gen. |
J: BOC (Lead-free) S: ? K: ? |
C: Normal Power (0ºC–95ºC) | B3 (XDR): 3.2Gbps, 35ns, 20Cycles 14 (GDDR3): 1.4ns (700MHz) 15 (GDDR5): 1.5ns (667MHz) |