Editing Timebases
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== IDT 6V41265NLG == | == IDT 6V41265NLG == | ||
This is a custom order clock synthesizer, possibly generating clock signals for a | This is a custom order clock synthesizer, possibly generating clock signals for a PCI-Express link between [[MediaCon]] and the [[APU]]. | ||
{| class="wikitable" | {| class="wikitable" | ||
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| NL || Package | | NL || Package | ||
|- | |- | ||
| G || Lead Free | |G || Lead Free | ||
|- | |||
|} | |} | ||
https://www.idt.com/document/ovr/timing-solutions-overview (Shows Part Number Legends at the end) | |||
{{Motherboard Components}} | {{Motherboard Components}} | ||
<noinclude>[[Category:Main]]</noinclude> | <noinclude>[[Category:Main]]</noinclude> |