CXD9208GP: Difference between revisions
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(→Pinout: "Pad" table column sorting corrections) |
Tag: Undo |
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PS2 bridge located in between EE+GS and the [[South Bridge]] | PS2 bridge located in between EE+GS and the [[South Bridge]] | ||
== Pinout == | |||
{| class="wikitable mw-datatable sortable" style="width:100%; line-height:1em; font-size:0.85em" | |||
|+ | |||
! style="border-bottom:hidden; padding:2px" | Pad !! colspan="2" | Name !! style="border-bottom:hidden; padding:2px" | Type !! style="border-bottom:hidden" | Description | |||
|- | |||
! style="border-top:hidden; padding:0px; background-position:50%" | !! style="width:25px; min-width:25px; padding-right:0px" | Internal !! style="width:25px; min-width:25px; padding-right:0px" | External !! style="border-top:hidden; background-position:50%" | !! style="border-top:hidden; background-position:50%" | | |||
|- | |- | ||
| data-sort-value="A01" | A1 || {{cellcolors|#333|#fff}} TEST_IN_0 || GND || {{pin}} || style="color:#888" | Ground | |||
|- | |- | ||
| data-sort-value=" | | data-sort-value="A02" | A2 || {{cellcolors|#333|#fff}} PLLAVS1 || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="A03" | A3 || {{cellcolors|#8f8}} SIF_MSCLK || MSCLK || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pads B8 and A21 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="A04" | A4 || {{cellcolors|#8f8}} SIF_WRAC || SIF_WRAC_BC || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad B23 (write ?) | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="A05" | A5 || {{cellcolors|#8f8}} SIF_DACK || SIF_DACK_BC || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad A25 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="A06" | A6 || {{cellcolors|#8f8}} SIF_DREQ0 || SIF_DREQ0_BC || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad B24 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="A07" | A7 || {{cellcolors|#8f8}} SIF_RDAC || SIF_RDAC_BC || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad A23 (read ?) | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="A08" | A8 || data-sort-value="SIF_AD04" {{cellcolors|#afa}} SIF_AD4 || data-sort-value="SIF_BC_AD04" | SIF_BC_AD4 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad A19 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="A09" | A9 || data-sort-value="SIF_AD07" {{cellcolors|#afa}} SIF_AD7 || data-sort-value="SIF_BC_AD07" | SIF_BC_AD7 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad C18 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="A10" | A10 || data-sort-value="SIF_AD09" {{cellcolors|#afa}} SIF_AD9 || data-sort-value="SIF_BC_AD09" | SIF_BC_AD9 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad B18 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="A11" | A11 || {{cellcolors|#afa}} SIF_AD18 || SIF_BC_AD18 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad A12 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="A12" | A12 || {{cellcolors|#afa}} SIF_AD21 || SIF_BC_AD21 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad C11 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="A13" | A13 || {{cellcolors|#afa}} SIF_AD29 || SIF_BC_AD29 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad B9 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="A14" | A14 || data-sort-value="SIF_AD06" {{cellcolors|#afa}} SIF_AD6 || data-sort-value="SIF_BC_AD06" | SIF_BC_AD6 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad A18 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="A99" style="padding:0px" | || colspan="4" data-sort-value="ZZZ" style="padding:0px" | | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="B01" | B1 || {{cellcolors|#eee|#888}} GPIO33_6 || CL7307 || {{pinnc}} || data-sort-value="Z" style="color:#888" | Testpad | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="B02" | B2 || {{cellcolors|#eee|#888}} GPIO33_5 || CL7302 || {{pinnc}} || data-sort-value="Z" style="color:#888" | Testpad | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="B03" | B3 || {{cellcolors|#e63|#fff}} PLLAVD1 || +1.5V_BRIDGE || {{pin}} || Connected to [[Regulators#Mitsumi_MM1591FFBEG_.28Low-Saturation_300mA_Regulators.29 | Mitsumi MM1591FFBEG]] (IC6021) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="B04" | B4 || {{cellcolors|#8f8}} SIF_SINT || SINT_BC || {{pino}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad C21 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="B05" | B5 || {{cellcolors|#6b6}} SIF_BE3 || SIF_BE3_BC || {{pino}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad C24 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="B06" | B6 || {{cellcolors|#8f8}} SIF_DREQ1 || SIF_DREQ1_BC || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad A24 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="B07" | B7 || {{cellcolors|#8f8}} SIF_RDY || SIF_RDY_BC || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad A22 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="B08" | B8 || {{cellcolors|#6b6}} SIF_BE2 || SIF_BE2_BC || {{pino}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad B21 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="B09" | B9 || data-sort-value="SIF_AD01" {{cellcolors|#afa}} SIF_AD1 || data-sort-value="SIF_BC_AD01" | SIF_BC_AD1 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad A20 | ||
|- | |- | ||
| data-sort-value="B10" | B10 || | | data-sort-value="B10" | B10 || data-sort-value="SIF_AD03" {{cellcolors|#afa}} SIF_AD3 || data-sort-value="SIF_BC_AD03" | SIF_BC_AD3 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad C19 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="B11" | B11 || {{cellcolors|#afa}} SIF_AD20 || SIF_BC_AD20 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad A11 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="B12" | B12 || {{cellcolors|#afa}} SIF_AD30 || SIF_BC_AD30 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad C9 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="B13" | B13 || {{cellcolors|#afa}} SIF_AD26 || SIF_BC_AD26 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad A9 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="B14" | B14 || {{cellcolors|#afa}} SIF_AD11 || SIF_BC_AD11 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad C15 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="B99" style="padding:0px" | || colspan="4" data-sort-value="ZZZ" style="padding:0px" | | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="C01" | C1 || {{cellcolors|#bbf}} PCI_AD30 || BC_PCI_AD30 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AU31 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="C02" | C2 || {{cellcolors|#bbf}} PCI_AD29 || BC_PCI_AD29 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AV31 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="C03" | C3 || {{cellcolors|#333|#fff}} TEST_IN_1 || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="C04" | C4 || {{cellcolors|#333|#fff}} VSS2 || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="C05" | C5 || {{cellcolors|#333|#fff}} VSS2 || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="C06" | C6 || {{cellcolors|#6b6}} SIF_BE0 || SIF_BE0_BC || {{pino}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad B22 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="C07" | C7 || {{cellcolors|#6b6}} SIF_BE1 || SIF_BE1_BC || {{pino}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad C22 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="C08" | C8 || data-sort-value="SIF_AD02" {{cellcolors|#afa}} SIF_AD2 || data-sort-value="SIF_BC_AD02" | SIF_BC_AD2 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad B20 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="C09" | C9 || data-sort-value="SIF_AD00" {{cellcolors|#afa}} SIF_AD0 || data-sort-value="SIF_BC_AD00" | SIF_BC_AD0 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad B19 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="C10" | C10 || {{cellcolors|#afa}} SIF_AD28 || SIF_BC_AD28 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad B12 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="C11" | C11 || {{cellcolors|#333|#fff}} VSS || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="C12" | C12 || {{cellcolors|#333|#fff}} VSS || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="C13" | C13 || {{cellcolors|#afa}} SIF_AD31 || SIF_BC_AD31 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad A8 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="C14" | C14 || {{cellcolors|#afa}} SIF_AD15 || SIF_BC_AD15 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad B15 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="C99" style="padding:0px" | || colspan="4" data-sort-value="ZZZ" style="padding:0px" | | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="D01" | D1 || {{cellcolors|#bbf}} PCI_AD26 || BC_PCI_AD26 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AU30 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="D02" | D2 || {{cellcolors|#bbf}} PCI_AD28 || BC_PCI_AD28 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AW31 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="D03" | D3 || {{cellcolors|#bbf}} PCI_AD31 || BC_PCI_AD31 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AT31 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="D04" | D4 || {{cellcolors|#333|#fff}} VSS || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="D05" | D5 || {{cellcolors|#e63|#fff}} VDDC || +1.5V_BRIDGE || {{pin}} || Connected to [[Regulators#Mitsumi_MM1591FFBEG_.28Low-Saturation_300mA_Regulators.29 | Mitsumi MM1591FFBEG]] (IC6021) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="D06" | D6 || {{cellcolors|#f93|#fff}} VDD || +1.5V_EEGS_VDDO || {{pin}} || Connected to [[Regulators#Mitsumi_MM1561FFBE_.28500_mA_Noise_Reduction_Voltage_Regulator.29 | Mitsumi MM1561FFBE]] (IC6606) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="D07" | D7 || {{cellcolors|#333|#fff}} VSS || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="D08" | D8 || {{cellcolors|#e63|#fff}} VDDC || +1.5V_BRIDGE || {{pin}} || Connected to [[Regulators#Mitsumi_MM1591FFBEG_.28Low-Saturation_300mA_Regulators.29 | Mitsumi MM1591FFBEG]] (IC6021) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="D09" | D9 || {{cellcolors|#f93|#fff}} VDD || +1.5V_EEGS_VDDO || {{pin}} || Connected to [[Regulators#Mitsumi_MM1561FFBE_.28500_mA_Noise_Reduction_Voltage_Regulator.29 | Mitsumi MM1561FFBE]] (IC6606) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="D10" | D10 || {{cellcolors|#333|#fff}} VSS || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="D11" | D11 || {{cellcolors|#f93|#fff}} VDD || +1.5V_EEGS_VDDO || {{pin}} || Connected to [[Regulators#Mitsumi_MM1561FFBE_.28500_mA_Noise_Reduction_Voltage_Regulator.29 | Mitsumi MM1561FFBE]] (IC6606) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="D12" | D12 || {{cellcolors|#afa}} SIF_AD10 || SIF_BC_AD10 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad B16 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="D13" | D13 || data-sort-value="SIF_AD05" {{cellcolors|#afa}} SIF_AD5 || data-sort-value="SIF_BC_AD05" | SIF_BC_AD5 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad A17 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="D14" | D14 || {{cellcolors|#afa}} SIF_AD14 || SIF_BC_AD14 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad B14 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="D99" style="padding:0px" | || colspan="4" data-sort-value="ZZZ" style="padding:0px" | | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="E01" | E1 || {{cellcolors|#bbf}} PCI_AD25 || BC_PCI_AD25 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AT29 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="E02" | E2 || {{cellcolors|#bbf}} PCI_AD27 || BC_PCI_AD27 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AT30 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="E03" | E3 || {{cellcolors|#bbf}} PCI_AD24 || BC_PCI_AD24 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AU29 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="E04" | E4 || {{cellcolors|#333|#fff}} VSS2 || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="E05" | E5 || {{cellcolors|#c33|#fff}} VDDS || +3.3V_BRIDGE || {{pin}} || Connected to [[Regulators#Mitsumi_MM1593DFBEG_.28Low-Saturation_300mA_Regulators.29 | Mitsumi MM1593DFBEG]] (IC6022) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="E06" | E6 || {{cellcolors|#e63|#fff}} VDDC || +1.5V_BRIDGE || {{pin}} || Connected to [[Regulators#Mitsumi_MM1591FFBEG_.28Low-Saturation_300mA_Regulators.29 | Mitsumi MM1591FFBEG]] (IC6021) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="E07" | E7 || {{cellcolors|#f93|#fff}} VDD || +1.5V_EEGS_VDDO || {{pin}} || Connected to [[Regulators#Mitsumi_MM1561FFBE_.28500_mA_Noise_Reduction_Voltage_Regulator.29 | Mitsumi MM1561FFBE]] (IC6606) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="E08" | E8 || {{cellcolors|#333|#fff}} VSS2 || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="E09" | E9 || {{cellcolors|#333|#fff}} TEST_IN_3 || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="E10" | E10 || {{cellcolors|#f93|#fff}} VDD2 || +1.5V_EEGS_VDDO || {{pin}} || Connected to [[Regulators#Mitsumi_MM1561FFBE_.28500_mA_Noise_Reduction_Voltage_Regulator.29 | Mitsumi MM1561FFBE]] (IC6606) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="E11" | E11 || {{cellcolors|#f93|#fff}} VDD2 || +1.5V_EEGS_VDDO || {{pin}} || Connected to [[Regulators#Mitsumi_MM1561FFBE_.28500_mA_Noise_Reduction_Voltage_Regulator.29 | Mitsumi MM1561FFBE]] (IC6606) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="E12" | E12 || {{cellcolors|#333|#fff}} TEST_IN_4 || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="E13" | E13 || data-sort-value="SIF_AD08" {{cellcolors|#afa}} SIF_AD8 || data-sort-value="SIF_BC_AD08" | SIF_BC_AD8 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad A16 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="E14" | E14 || {{cellcolors|#afa}} SIF_AD13 || SIF_BC_AD13 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad C14 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="E99" style="padding:0px" | || colspan="4" data-sort-value="ZZZ" style="padding:0px" | | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="F01" | F1 || {{cellcolors|#bbf}} PCI_AD20 || BC_PCI_AD20 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AU28 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="F02" | F2 || {{cellcolors|#bbf}} PCI_AD22 || BC_PCI_AD22 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AW29 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="F03" | F3 || {{cellcolors|#bbf}} PCI_AD18 || BC_PCI_AD18 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AU27 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="F04" | F4 || {{cellcolors|#e63|#fff}} VDDC || +1.5V_BRIDGE || {{pin}} || Connected to [[Regulators#Mitsumi_MM1591FFBEG_.28Low-Saturation_300mA_Regulators.29 | Mitsumi MM1591FFBEG]] (IC6021) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="F05" | F5 || {{cellcolors|#c33|#fff}} VDDS || +3.3V_BRIDGE || {{pin}} || Connected to [[Regulators#Mitsumi_MM1593DFBEG_.28Low-Saturation_300mA_Regulators.29 | Mitsumi MM1593DFBEG]] (IC6022) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="F06" | F6 || {{cellcolors|#333|#fff}} VSS || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="F07" | F7 || {{cellcolors|#333|#fff}} VSS || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="F08" | F8 || {{cellcolors|#333|#fff}} TEST_IN_2 || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="F09" | F9 || {{cellcolors|#c33|#fff}} VDDS || +3.3V_BRIDGE || {{pin}} || Connected to [[Regulators#Mitsumi_MM1593DFBEG_.28Low-Saturation_300mA_Regulators.29 | Mitsumi MM1593DFBEG]] (IC6022) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="F10" | F10 || {{cellcolors|#f93|#fff}} VDD || +1.5V_EEGS_VDDO || {{pin}} || Connected to [[Regulators#Mitsumi_MM1561FFBE_.28500_mA_Noise_Reduction_Voltage_Regulator.29 | Mitsumi MM1561FFBE]] (IC6606) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="F11" | F11 || {{cellcolors|#333|#fff}} VSS2 || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="F12" | F12 || {{cellcolors|#eee|#888}} GPIO15_0 || CL7306 || {{pinnc}} || data-sort-value="Z" style="color:#888" | Testpad | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="F13" | F13 || {{cellcolors|#afa}} SIF_AD12 || SIF_BC_AD12 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad A15 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="F14" | F14 || {{cellcolors|#afa}} SIF_AD24 || SIF_BC_AD24 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad B11 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="F99" style="padding:0px" | || colspan="4" data-sort-value="ZZZ" style="padding:0px" | | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="G01" | G1 || {{cellcolors|#bbf}} PCI_AD21 || BC_PCI_AD21 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AT28 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="G02" | G2 || {{cellcolors|#bbf}} PCI_AD23 || BC_PCI_AD23 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AV29 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="G03" | G3 || {{cellcolors|#99f}} PCI_IDSEL || BC_PCI_AD17 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AV27 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="G04" | G4 || {{cellcolors|#333|#fff}} VSS || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="G05" | G5 || {{cellcolors|#333|#fff}} VSS2 || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="G06" | G6 || {{cellcolors|#333|#fff}} VSS || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="G07" | G7 || {{cellcolors|#c33|#fff}} VDDS || +3.3V_BRIDGE || {{pin}} || Connected to [[Regulators#Mitsumi_MM1593DFBEG_.28Low-Saturation_300mA_Regulators.29 | Mitsumi MM1593DFBEG]] (IC6022) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="G08" | G8 || {{cellcolors|#f93|#fff}} VDD2 || +1.5V_EEGS_VDDO || {{pin}} || Connected to [[Regulators#Mitsumi_MM1561FFBE_.28500_mA_Noise_Reduction_Voltage_Regulator.29 | Mitsumi MM1561FFBE]] (IC6606) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="G09" | G9 || {{cellcolors|#e63|#fff}} VDDC || +1.5V_BRIDGE || {{pin}} || Connected to [[Regulators#Mitsumi_MM1591FFBEG_.28Low-Saturation_300mA_Regulators.29 | Mitsumi MM1591FFBEG]] (IC6021) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="G10" | G10 || {{cellcolors|#333|#fff}} VSS2 || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="G11" | G11 || {{cellcolors|#e63|#fff}} VDDC || +1.5V_BRIDGE || {{pin}} || Connected to [[Regulators#Mitsumi_MM1591FFBEG_.28Low-Saturation_300mA_Regulators.29 | Mitsumi MM1591FFBEG]] (IC6021) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="G12" | G12 || {{cellcolors|#eee|#888}} GPIO15_1 || CL7311 || {{pinnc}} || data-sort-value="Z" style="color:#888" | Testpad | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="G13" | G13 || {{cellcolors|#afa}} SIF_AD16 || SIF_BC_AD16 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad A14 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="G14" | G14 || {{cellcolors|#afa}} SIF_AD23 || SIF_BC_AD23 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad A10 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="G99" style="padding:0px" | || colspan="4" data-sort-value="ZZZ" style="padding:0px" | | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="H01" | H1 || {{cellcolors|#bbf}} PCI_AD15 || BC_PCI_AD15 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AT23 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="H02" | H2 || {{cellcolors|#bbf}} PCI_AD16 || BC_PCI_AD16 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AW27 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="H03" | H3 || {{cellcolors|#bbf}} PCI_AD19 || BC_PCI_AD19 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AT27 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="H04" | H4 || {{cellcolors|#e63|#fff}} VDDC || +1.5V_BRIDGE || {{pin}} || Connected to [[Regulators#Mitsumi_MM1591FFBEG_.28Low-Saturation_300mA_Regulators.29 | Mitsumi MM1591FFBEG]] (IC6021) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="H05" | H5 || {{cellcolors|#333|#fff}} TEST_PLL_BP_0 || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="H06" | H6 || {{cellcolors|#333|#fff}} VSS2 || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="H07" | H7 || {{cellcolors|#e63|#fff}} VDDC || +1.5V_BRIDGE || {{pin}} || Connected to [[Regulators#Mitsumi_MM1591FFBEG_.28Low-Saturation_300mA_Regulators.29 | Mitsumi MM1591FFBEG]] (IC6021) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="H08" | H8 || {{cellcolors|#c33|#fff}} VDDS || +3.3V_BRIDGE || {{pin}} || Connected to [[Regulators#Mitsumi_MM1593DFBEG_.28Low-Saturation_300mA_Regulators.29 | Mitsumi MM1593DFBEG]] (IC6022) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="H09" | H9 || {{cellcolors|#f93|#fff}} VDD2 || +1.5V_EEGS_VDDO || {{pin}} || Connected to [[Regulators#Mitsumi_MM1561FFBE_.28500_mA_Noise_Reduction_Voltage_Regulator.29 | Mitsumi MM1561FFBE]] (IC6606) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="H10" | H10 || {{cellcolors|#333|#fff}} VSS || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="H11" | H11 || {{cellcolors|#f93|#fff}} VDD || +1.5V_EEGS_VDDO || {{pin}} || Connected to [[Regulators#Mitsumi_MM1561FFBE_.28500_mA_Noise_Reduction_Voltage_Regulator.29 | Mitsumi MM1561FFBE]] (IC6606) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="H12" | H12 || {{cellcolors|#eee|#888}} GPIO15_2 || CL7305 || {{pinnc}} || data-sort-value="Z" style="color:#888" | Testpad | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="H13" | H13 || {{cellcolors|#afa}} SIF_AD22 || SIF_BC_AD22 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad C13 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="H14" | H14 || {{cellcolors|#afa}} SIF_AD25 || SIF_BC_AD25 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad B10 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="H99" style="padding:0px" | || colspan="4" data-sort-value="ZZZ" style="padding:0px" | | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="J01" | J1 || {{cellcolors|#bbf}} PCI_AD14 || BC_PCI_AD14 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AU23 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="J02" | J2 || {{cellcolors|#bbf}} PCI_AD17 || BC_PCI_AD17 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AV27 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="J03" | J3 || data-sort-value="PCI_AD06" {{cellcolors|#bbf}} PCI_AD6 || data-sort-value="BC_PCI_AD06" | BC_PCI_AD6 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AW21 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="J04" | J4 || {{cellcolors|#e63|#fff}} VDDC || +1.5V_BRIDGE || {{pin}} || Connected to [[Regulators#Mitsumi_MM1591FFBEG_.28Low-Saturation_300mA_Regulators.29 | Mitsumi MM1591FFBEG]] (IC6021) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="J05" | J5 || {{cellcolors|#c33|#fff}} VDDS || +3.3V_BRIDGE || {{pin}} || Connected to [[Regulators#Mitsumi_MM1593DFBEG_.28Low-Saturation_300mA_Regulators.29 | Mitsumi MM1593DFBEG]] (IC6022) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="J06" | J6 || {{cellcolors|#333|#fff}} VSS || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="J07" | J7 || {{cellcolors|#c33|#fff}} VDDS || +3.3V_BRIDGE || {{pin}} || Connected to [[Regulators#Mitsumi_MM1593DFBEG_.28Low-Saturation_300mA_Regulators.29 | Mitsumi MM1593DFBEG]] (IC6022) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="J08" | J8 || {{cellcolors|#333|#fff}} VSS || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="J09" | J9 || {{cellcolors|#333|#fff}} VSS || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="J10" | J10 || {{cellcolors|#333|#fff}} VSS2 || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="J11" | J11 || {{cellcolors|#e63|#fff}} VDDC || +1.5V_BRIDGE || {{pin}} || Connected to [[Regulators#Mitsumi_MM1591FFBEG_.28Low-Saturation_300mA_Regulators.29 | Mitsumi MM1591FFBEG]] (IC6021) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="J12" | J12 || {{cellcolors|#eee|#888}} GPIO33_0 || CL7310 || {{pinnc}} || data-sort-value="Z" style="color:#888" | Testpad | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="J13" | J13 || {{cellcolors|#afa}} SIF_AD19 || SIF_BC_AD19 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad B13 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="J14" | J14 || {{cellcolors|#afa}} SIF_AD27 || SIF_BC_AD27 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad C10 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="J99" style="padding:0px" | || colspan="4" data-sort-value="ZZZ" style="padding:0px" | | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="K01" | K1 || data-sort-value="PCI_AD09" {{cellcolors|#bbf}} PCI_AD9 || data-sort-value="BC_PCI_AD09" | BC_PCI_AD9 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AT21 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="K02" | K2 || {{cellcolors|#bbf}} PCI_AD11 || BC_PCI_AD11 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AT22 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="K03" | K3 || {{cellcolors|#bbf}} PCI_AD10 || BC_PCI_AD10 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AU22 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="K04" | K4 || {{cellcolors|#333|#fff}} VSS || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="K05" | K5 || {{cellcolors|#e63|#fff}} VDDC || +1.5V_BRIDGE || {{pin}} || Connected to [[Regulators#Mitsumi_MM1591FFBEG_.28Low-Saturation_300mA_Regulators.29 | Mitsumi MM1591FFBEG]] (IC6021) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="K06" | K6 || {{cellcolors|#c33|#fff}} VDDS || +3.3V_BRIDGE || {{pin}} || Connected to [[Regulators#Mitsumi_MM1593DFBEG_.28Low-Saturation_300mA_Regulators.29 | Mitsumi MM1593DFBEG]] (IC6022) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="K07" | K7 || {{cellcolors|#c33|#fff}} VDDS || +3.3V_BRIDGE || {{pin}} || Connected to [[Regulators#Mitsumi_MM1593DFBEG_.28Low-Saturation_300mA_Regulators.29 | Mitsumi MM1593DFBEG]] (IC6022) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="K08" | K8 || {{cellcolors|#333|#fff}} TEST_PLL_BP_1 || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="K09" | K9 || {{cellcolors|#333|#fff}} VSS || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="K10" | K10 || {{cellcolors|#f93|#fff}} VDD || +1.5V_EEGS_VDDO || {{pin}} || Connected to [[Regulators#Mitsumi_MM1561FFBE_.28500_mA_Noise_Reduction_Voltage_Regulator.29 | Mitsumi MM1561FFBE]] (IC6606) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="K11" | K11 || {{cellcolors|#333|#fff}} VSS || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="K12" | K12 || {{cellcolors|#eee|#888}} GPIO33_1 || CL7304 || {{pinnc}} || data-sort-value="Z" style="color:#888" | Testpad | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="K13" | K13 || {{cellcolors|#afa}} SIF_AD17 || SIF_BC_AD17 || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad A13 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="K14" | K14 || {{cellcolors|#8f8}} SIF_BREQ || BREQ_BC || {{pino}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad A7 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="K99" style="padding:0px" | || colspan="4" data-sort-value="ZZZ" style="padding:0px" | | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="L01" | L1 || data-sort-value="PCI_AD03" {{cellcolors|#bbf}} PCI_AD3 || data-sort-value="BC_PCI_AD03" | BC_PCI_AD3 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AT19 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="L02" | L2 || data-sort-value="PCI_AD07" {{cellcolors|#bbf}} PCI_AD7 || data-sort-value="BC_PCI_AD07" | BC_PCI_AD7 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AV21 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="L03" | L3 || {{cellcolors|#bbf}} PCI_AD13 || BC_PCI_AD13 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AV23 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="L04" | L4 || {{cellcolors|#e63|#fff}} VDDC || +1.5V_BRIDGE || {{pin}} || Connected to [[Regulators#Mitsumi_MM1591FFBEG_.28Low-Saturation_300mA_Regulators.29 | Mitsumi MM1591FFBEG]] (IC6021) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="L05" | L5 || {{cellcolors|#333|#fff}} VSS2 || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="L06" | L6 || {{cellcolors|#333|#fff}} VSS || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="L07" | L7 || {{cellcolors|#333|#fff}} VSS2 || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="L08" | L8 || {{cellcolors|#333|#fff}} VSS || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="L09" | L9 || {{cellcolors|#c33|#fff}} VDDS || +3.3V_BRIDGE || {{pin}} || Connected to [[Regulators#Mitsumi_MM1593DFBEG_.28Low-Saturation_300mA_Regulators.29 | Mitsumi MM1593DFBEG]] (IC6022) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="L10" | L10 || {{cellcolors|#c33|#fff}} VDDS || +3.3V_BRIDGE || {{pin}} || Connected to [[Regulators#Mitsumi_MM1593DFBEG_.28Low-Saturation_300mA_Regulators.29 | Mitsumi MM1593DFBEG]] (IC6022) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="L11" | L11 || {{cellcolors|#333|#fff}} VSS || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="L12" | L12 || {{cellcolors|#eee|#888}} GPIO33_2 || CL7309 || {{pinnc}} || data-sort-value="Z" style="color:#888" | Testpad | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="L13" | L13 || {{cellcolors|#8f8}} SIF_BGNT || BGNT_BC || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad B7 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="L14" | L14 || {{cellcolors|#8f8}} SIF_GINT || SGINT_BC || {{pini}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad B6 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="L99" style="padding:0px" | || colspan="4" data-sort-value="ZZZ" style="padding:0px" | | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="M01" | M1 || data-sort-value="PCI_AD04" {{cellcolors|#bbf}} PCI_AD4 || data-sort-value="BC_PCI_AD04" | BC_PCI_AD4 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AU20 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="M02" | M2 || data-sort-value="PCI_AD02" {{cellcolors|#bbf}} PCI_AD2 || data-sort-value="BC_PCI_AD02" | BC_PCI_AD2 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AU19 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="M03" | M3 || data-sort-value="PCI_AD01" {{cellcolors|#bbf}} PCI_AD1 || data-sort-value="BC_PCI_AD01" | BC_PCI_AD1 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AV19 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="M04" | M4 || {{cellcolors|#333|#fff}} VSS2 || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="M05" | M5 || {{cellcolors|#99f}} PCI_STOP || BC_PCI_STOP || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AV25 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="M06" | M6 || {{cellcolors|#99f}} PCI_PAR || BC_PCI_PAR || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AU24 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="M07" | M7 || {{cellcolors|#99f}} PCI_TRDY || BC_PCI_TRDY || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AT25 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="M08" | M8 || {{cellcolors|#77f}} PCI_CBE0 || BC_PCI_CBE0 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AP19 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="M09" | M9 || {{cellcolors|#99f}} PCI_FRAME || BC_PCI_FRAME || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AT26 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="M10" | M10 || {{cellcolors|#99f}} PCI_RST || BC_PCI_RST || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AP29 through a 22 ohm resistor | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="M11" | M11 || {{cellcolors|#ff4|#f00}} SW1.5 || SW1.5 || {{pino}} || Connected to [[Regulators#Mitsumi_MM1561FFBE_.28500_mA_Noise_Reduction_Voltage_Regulator.29 | Mitsumi MM1561FFBE]] (IC6606) pin 5 (switches +1.5V_EEGS_VDDO) | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="M12" | M12 || {{cellcolors|#eee|#888}} GPIO33_3 || CL7303 || {{pinnc}} || data-sort-value="Z" style="color:#888" | Testpad | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="M13" | M13 || {{cellcolors|#4c4}} VBLK || EEGS_VBLK1 || {{pino}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad A4 ('''V'''ertical '''BL'''an'''K''') | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="M14" | M14 || {{cellcolors|#4c4}} HBLK || EEGS_HBLK1 || {{pino}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad B5 ('''H'''orizontal '''BL'''an'''K''') | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="M99" style="padding:0px" | || colspan="4" data-sort-value="ZZZ" style="padding:0px" | | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="N01" | N1 || data-sort-value="PCI_AD08" {{cellcolors|#bbf}} PCI_AD8 || data-sort-value="BC_PCI_AD08" | BC_PCI_AD8 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AU21 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="N02" | N2 || data-sort-value="PCI_AD05" {{cellcolors|#bbf}} PCI_AD5 || data-sort-value="BC_PCI_AD05" | BC_PCI_AD5 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AT20 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="N03" | N3 || {{cellcolors|#e63|#fff}} PLLAVD0 || +1.5V_BRIDGE || {{pin}} || Connected to [[Regulators#Mitsumi_MM1591FFBEG_.28Low-Saturation_300mA_Regulators.29 | Mitsumi MM1591FFBEG]] (IC6021) pin 1 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="N04" | N4 || data-sort-value="PCI_AD00" {{cellcolors|#bbf}} PCI_AD0 || data-sort-value="BC_PCI_AD00" | BC_PCI_AD0 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AW19 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="N05" | N5 || {{cellcolors|#99f|#a00}} PCI_SERR || BC_PCI_SERR || {{pino}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AT24 (system error) | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="N06" | N6 || {{cellcolors|#99f}} PCI_DEVSEL || BC_PCI_DEVSEL || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AU25 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="N07" | N7 || {{cellcolors|#77f}} PCI_CBE2 || BC_PCI_CBE2 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AP20 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="N08" | N8 || {{cellcolors|#99f}} PCI_GNT || BC_PCI_GNT1 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AN24 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="N09" | N9 || {{cellcolors|#ff4|#f00}} SW2.65 || SW2.65 || {{pino}} || Connected to [[Regulators#Mitsumi_MM1662YHBE_.281000_mA_Noise_Reduction_Voltage_Regulator.29 | Mitsumi MM1662YHBE]] (IC6607) pin 5 (switches +2.5V_RDRAM_VDD) | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="N10" | N10 || {{cellcolors|#ff4|#f00}} SW3.3 || SW3.3 || {{pino}} || Connected to [[Regulators#Mitsumi_MM1573ENRE_.28150_mA_CMOS_Low_noise_Voltage_Regulator.29 | Mitsumi MM1573ENRE]] (IC6605) pin 3 (switches +3.3V_DRCG_VDD) | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="N11" | N11 || {{cellcolors|#ff4|#f00}} SW1.81 || SW1.81 || {{pino}} || Connected to [[Regulators#Mitsumi_MM1561JFBE_.28Low-Saturation_500mA_Regulators.29 | Mitsumi MM1561JFBE]] (IC6603) pin 5 (switches +1.8V_EEGS_VDDIO) | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="N12" | N12 || {{cellcolors|#eee|#888}} GPIO33_4 || CL7308 || {{pinnc}} || data-sort-value="Z" style="color:#888" | Testpad | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="N13" | N13 || {{cellcolors|#ff8}} PCLKEN || PCLKEN || {{pino}} || Connected to base pin of DTC144EUA-T106 transistor (Q2101) to switch [[TC7WP3125FK]] (IC2105) and generate the clock DRCG_GEN18M<br>DRCG_GEN18M is a input of the [[Components#ICS_ICS626BGLFT|Renesas ICS626BGLFT]] (IC7001) that generates the clocks for the communications in between EEGS and the RDRAM chips (CTMA/CTMNA and CTMB/CTMNB) | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="N14" | N14 || {{cellcolors|#dd4|#080}} EGRST || EGRST || {{pino}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad B4 (control line to reset EEGS) | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="N99" style="padding:0px" | || colspan="4" data-sort-value="ZZZ" style="padding:0px" | | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="P01" | P1 || {{cellcolors|#bbf}} PCI_AD12 || BC_PCI_AD12 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AW23 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="P02" | P2 || {{cellcolors|#333|#fff}} PLLAVS0 || GND || {{pin}} || style="color:#888" | Ground | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="P03" | P3 || {{cellcolors|#99f}} PCI_CLK || BC_PCI_CLK || {{pini}} || Connected to [[Timebases#ICS_ICS1493G-18LFT | ICS1493G-18LFT]] (IC5001) pin 5<br>Connected to [[South Bridge]] [[CXD2973GB]] pad AP28 through a 49.9 ohm resistor | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="P04" | P4 || {{cellcolors|#77f}} PCI_CBE1 || BC_PCI_CBE1 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AN19 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="P05" | P5 || {{cellcolors|#99f|#a00}} PCI_PERR || BC_PCI_PERR || {{pino}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AW25 (parity error) | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="P06" | P6 || {{cellcolors|#99f}} PCI_IRDY || BC_PCI_IRDY || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AU26 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="P07" | P7 || {{cellcolors|#77f}} PCI_CBE3 || BC_PCI_CBE3 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AN20 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="P08" | P8 || {{cellcolors|#99f}} PCI_REQ || BC_PCI_REQ1 || {{pini}} || Connected to [[South Bridge]] [[CXD2973GB]] pad AN22 | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="P09" | P9 || {{cellcolors|#ff4|#f00}} SW1.8 || SW1.8 || {{pino}} || Connected to a missing component (IC6604) pin 3 (switches +1.8V_RDRAM_VCMOS) | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="P10" | P10 || {{cellcolors|#ff4|#f00}} SW2.5 || SW2.5 || {{pino}} || Connected to [[Regulators#OnSemi_NCP511SN25T1G_.282.5V_150_mA_CMOS_Low_Iq_Low-Dropout_Voltage_Regulator.29 | OnSemi NCP511SN25T1G]] (IC6601) pin 3 (switches +2.5V_EEGS_PLLVDD1) | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="P11" | P11 || {{cellcolors|#ff4|#f00}} SW1.2 || SW1.2 || {{pino}} || Connected to [[Regulators#Rohm_BD3504FVM-TR_.28Single_channel_Regulator_Driver_IC.29 | Rohm BD3504FVM-TR]] (IC6602) pin 3 (switches +1.2V_EEGS_VDD) | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="P12" | P12 || {{cellcolors|#ff4|#f00}} SW3.1 || SW3.1 || {{pino}} || Connected to [[Regulators#Mitsumi_MM3143BNRE_.28150_mA_CMOS_Low_noise_Voltage_Regulator.29 | Mitsumi MM3143BNRE]] (IC6600) pin 3 (switches +3.1V_EEGS_AVDA) | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="P13" | P13 || {{cellcolors|#eee|#888}} GPIO33_7 || CL7301 || {{pinnc}} || data-sort-value="Z" style="color:#888" | Testpad | ||
|- | |- | ||
| data-sort-value=" | | data-sort-value="P14" | P14 || {{cellcolors|#dd4|#080}} PWRUP_EE || PWRUP_EE || {{pino}} || Connected to [[CXD2953AGB | EEGS CXD2953AGB]] pad Y1 (control line to power EEGS) | ||
|} | |} | ||
{{Motherboard Components}}<noinclude>[[Category:Main]]</noinclude> |
Latest revision as of 12:03, 20 October 2022
Sony CXD9208GP (PS2 bridge chip)[edit | edit source]
6-710-433-01 / IC7301
Used on PS3 FAT CECHAxx/COK-001 and CECHBxx/COK-001
PS2 bridge located in between EE+GS and the South Bridge
Pinout[edit | edit source]
Name | ||||
---|---|---|---|---|
Internal | External | |||
A1 | TEST_IN_0 | GND | Ground | |
A2 | PLLAVS1 | GND | Ground | |
A3 | SIF_MSCLK | MSCLK | Connected to EEGS CXD2953AGB pads B8 and A21 | |
A4 | SIF_WRAC | SIF_WRAC_BC | Connected to EEGS CXD2953AGB pad B23 (write ?) | |
A5 | SIF_DACK | SIF_DACK_BC | Connected to EEGS CXD2953AGB pad A25 | |
A6 | SIF_DREQ0 | SIF_DREQ0_BC | Connected to EEGS CXD2953AGB pad B24 | |
A7 | SIF_RDAC | SIF_RDAC_BC | Connected to EEGS CXD2953AGB pad A23 (read ?) | |
A8 | SIF_AD4 | SIF_BC_AD4 | Connected to EEGS CXD2953AGB pad A19 | |
A9 | SIF_AD7 | SIF_BC_AD7 | Connected to EEGS CXD2953AGB pad C18 | |
A10 | SIF_AD9 | SIF_BC_AD9 | Connected to EEGS CXD2953AGB pad B18 | |
A11 | SIF_AD18 | SIF_BC_AD18 | Connected to EEGS CXD2953AGB pad A12 | |
A12 | SIF_AD21 | SIF_BC_AD21 | Connected to EEGS CXD2953AGB pad C11 | |
A13 | SIF_AD29 | SIF_BC_AD29 | Connected to EEGS CXD2953AGB pad B9 | |
A14 | SIF_AD6 | SIF_BC_AD6 | Connected to EEGS CXD2953AGB pad A18 | |
B1 | GPIO33_6 | CL7307 | Testpad | |
B2 | GPIO33_5 | CL7302 | Testpad | |
B3 | PLLAVD1 | +1.5V_BRIDGE | Connected to Mitsumi MM1591FFBEG (IC6021) pin 1 | |
B4 | SIF_SINT | SINT_BC | Connected to EEGS CXD2953AGB pad C21 | |
B5 | SIF_BE3 | SIF_BE3_BC | Connected to EEGS CXD2953AGB pad C24 | |
B6 | SIF_DREQ1 | SIF_DREQ1_BC | Connected to EEGS CXD2953AGB pad A24 | |
B7 | SIF_RDY | SIF_RDY_BC | Connected to EEGS CXD2953AGB pad A22 | |
B8 | SIF_BE2 | SIF_BE2_BC | Connected to EEGS CXD2953AGB pad B21 | |
B9 | SIF_AD1 | SIF_BC_AD1 | Connected to EEGS CXD2953AGB pad A20 | |
B10 | SIF_AD3 | SIF_BC_AD3 | Connected to EEGS CXD2953AGB pad C19 | |
B11 | SIF_AD20 | SIF_BC_AD20 | Connected to EEGS CXD2953AGB pad A11 | |
B12 | SIF_AD30 | SIF_BC_AD30 | Connected to EEGS CXD2953AGB pad C9 | |
B13 | SIF_AD26 | SIF_BC_AD26 | Connected to EEGS CXD2953AGB pad A9 | |
B14 | SIF_AD11 | SIF_BC_AD11 | Connected to EEGS CXD2953AGB pad C15 | |
C1 | PCI_AD30 | BC_PCI_AD30 | Connected to South Bridge CXD2973GB pad AU31 | |
C2 | PCI_AD29 | BC_PCI_AD29 | Connected to South Bridge CXD2973GB pad AV31 | |
C3 | TEST_IN_1 | GND | Ground | |
C4 | VSS2 | GND | Ground | |
C5 | VSS2 | GND | Ground | |
C6 | SIF_BE0 | SIF_BE0_BC | Connected to EEGS CXD2953AGB pad B22 | |
C7 | SIF_BE1 | SIF_BE1_BC | Connected to EEGS CXD2953AGB pad C22 | |
C8 | SIF_AD2 | SIF_BC_AD2 | Connected to EEGS CXD2953AGB pad B20 | |
C9 | SIF_AD0 | SIF_BC_AD0 | Connected to EEGS CXD2953AGB pad B19 | |
C10 | SIF_AD28 | SIF_BC_AD28 | Connected to EEGS CXD2953AGB pad B12 | |
C11 | VSS | GND | Ground | |
C12 | VSS | GND | Ground | |
C13 | SIF_AD31 | SIF_BC_AD31 | Connected to EEGS CXD2953AGB pad A8 | |
C14 | SIF_AD15 | SIF_BC_AD15 | Connected to EEGS CXD2953AGB pad B15 | |
D1 | PCI_AD26 | BC_PCI_AD26 | Connected to South Bridge CXD2973GB pad AU30 | |
D2 | PCI_AD28 | BC_PCI_AD28 | Connected to South Bridge CXD2973GB pad AW31 | |
D3 | PCI_AD31 | BC_PCI_AD31 | Connected to South Bridge CXD2973GB pad AT31 | |
D4 | VSS | GND | Ground | |
D5 | VDDC | +1.5V_BRIDGE | Connected to Mitsumi MM1591FFBEG (IC6021) pin 1 | |
D6 | VDD | +1.5V_EEGS_VDDO | Connected to Mitsumi MM1561FFBE (IC6606) pin 1 | |
D7 | VSS | GND | Ground | |
D8 | VDDC | +1.5V_BRIDGE | Connected to Mitsumi MM1591FFBEG (IC6021) pin 1 | |
D9 | VDD | +1.5V_EEGS_VDDO | Connected to Mitsumi MM1561FFBE (IC6606) pin 1 | |
D10 | VSS | GND | Ground | |
D11 | VDD | +1.5V_EEGS_VDDO | Connected to Mitsumi MM1561FFBE (IC6606) pin 1 | |
D12 | SIF_AD10 | SIF_BC_AD10 | Connected to EEGS CXD2953AGB pad B16 | |
D13 | SIF_AD5 | SIF_BC_AD5 | Connected to EEGS CXD2953AGB pad A17 | |
D14 | SIF_AD14 | SIF_BC_AD14 | Connected to EEGS CXD2953AGB pad B14 | |
E1 | PCI_AD25 | BC_PCI_AD25 | Connected to South Bridge CXD2973GB pad AT29 | |
E2 | PCI_AD27 | BC_PCI_AD27 | Connected to South Bridge CXD2973GB pad AT30 | |
E3 | PCI_AD24 | BC_PCI_AD24 | Connected to South Bridge CXD2973GB pad AU29 | |
E4 | VSS2 | GND | Ground | |
E5 | VDDS | +3.3V_BRIDGE | Connected to Mitsumi MM1593DFBEG (IC6022) pin 1 | |
E6 | VDDC | +1.5V_BRIDGE | Connected to Mitsumi MM1591FFBEG (IC6021) pin 1 | |
E7 | VDD | +1.5V_EEGS_VDDO | Connected to Mitsumi MM1561FFBE (IC6606) pin 1 | |
E8 | VSS2 | GND | Ground | |
E9 | TEST_IN_3 | GND | Ground | |
E10 | VDD2 | +1.5V_EEGS_VDDO | Connected to Mitsumi MM1561FFBE (IC6606) pin 1 | |
E11 | VDD2 | +1.5V_EEGS_VDDO | Connected to Mitsumi MM1561FFBE (IC6606) pin 1 | |
E12 | TEST_IN_4 | GND | Ground | |
E13 | SIF_AD8 | SIF_BC_AD8 | Connected to EEGS CXD2953AGB pad A16 | |
E14 | SIF_AD13 | SIF_BC_AD13 | Connected to EEGS CXD2953AGB pad C14 | |
F1 | PCI_AD20 | BC_PCI_AD20 | Connected to South Bridge CXD2973GB pad AU28 | |
F2 | PCI_AD22 | BC_PCI_AD22 | Connected to South Bridge CXD2973GB pad AW29 | |
F3 | PCI_AD18 | BC_PCI_AD18 | Connected to South Bridge CXD2973GB pad AU27 | |
F4 | VDDC | +1.5V_BRIDGE | Connected to Mitsumi MM1591FFBEG (IC6021) pin 1 | |
F5 | VDDS | +3.3V_BRIDGE | Connected to Mitsumi MM1593DFBEG (IC6022) pin 1 | |
F6 | VSS | GND | Ground | |
F7 | VSS | GND | Ground | |
F8 | TEST_IN_2 | GND | Ground | |
F9 | VDDS | +3.3V_BRIDGE | Connected to Mitsumi MM1593DFBEG (IC6022) pin 1 | |
F10 | VDD | +1.5V_EEGS_VDDO | Connected to Mitsumi MM1561FFBE (IC6606) pin 1 | |
F11 | VSS2 | GND | Ground | |
F12 | GPIO15_0 | CL7306 | Testpad | |
F13 | SIF_AD12 | SIF_BC_AD12 | Connected to EEGS CXD2953AGB pad A15 | |
F14 | SIF_AD24 | SIF_BC_AD24 | Connected to EEGS CXD2953AGB pad B11 | |
G1 | PCI_AD21 | BC_PCI_AD21 | Connected to South Bridge CXD2973GB pad AT28 | |
G2 | PCI_AD23 | BC_PCI_AD23 | Connected to South Bridge CXD2973GB pad AV29 | |
G3 | PCI_IDSEL | BC_PCI_AD17 | Connected to South Bridge CXD2973GB pad AV27 | |
G4 | VSS | GND | Ground | |
G5 | VSS2 | GND | Ground | |
G6 | VSS | GND | Ground | |
G7 | VDDS | +3.3V_BRIDGE | Connected to Mitsumi MM1593DFBEG (IC6022) pin 1 | |
G8 | VDD2 | +1.5V_EEGS_VDDO | Connected to Mitsumi MM1561FFBE (IC6606) pin 1 | |
G9 | VDDC | +1.5V_BRIDGE | Connected to Mitsumi MM1591FFBEG (IC6021) pin 1 | |
G10 | VSS2 | GND | Ground | |
G11 | VDDC | +1.5V_BRIDGE | Connected to Mitsumi MM1591FFBEG (IC6021) pin 1 | |
G12 | GPIO15_1 | CL7311 | Testpad | |
G13 | SIF_AD16 | SIF_BC_AD16 | Connected to EEGS CXD2953AGB pad A14 | |
G14 | SIF_AD23 | SIF_BC_AD23 | Connected to EEGS CXD2953AGB pad A10 | |
H1 | PCI_AD15 | BC_PCI_AD15 | Connected to South Bridge CXD2973GB pad AT23 | |
H2 | PCI_AD16 | BC_PCI_AD16 | Connected to South Bridge CXD2973GB pad AW27 | |
H3 | PCI_AD19 | BC_PCI_AD19 | Connected to South Bridge CXD2973GB pad AT27 | |
H4 | VDDC | +1.5V_BRIDGE | Connected to Mitsumi MM1591FFBEG (IC6021) pin 1 | |
H5 | TEST_PLL_BP_0 | GND | Ground | |
H6 | VSS2 | GND | Ground | |
H7 | VDDC | +1.5V_BRIDGE | Connected to Mitsumi MM1591FFBEG (IC6021) pin 1 | |
H8 | VDDS | +3.3V_BRIDGE | Connected to Mitsumi MM1593DFBEG (IC6022) pin 1 | |
H9 | VDD2 | +1.5V_EEGS_VDDO | Connected to Mitsumi MM1561FFBE (IC6606) pin 1 | |
H10 | VSS | GND | Ground | |
H11 | VDD | +1.5V_EEGS_VDDO | Connected to Mitsumi MM1561FFBE (IC6606) pin 1 | |
H12 | GPIO15_2 | CL7305 | Testpad | |
H13 | SIF_AD22 | SIF_BC_AD22 | Connected to EEGS CXD2953AGB pad C13 | |
H14 | SIF_AD25 | SIF_BC_AD25 | Connected to EEGS CXD2953AGB pad B10 | |
J1 | PCI_AD14 | BC_PCI_AD14 | Connected to South Bridge CXD2973GB pad AU23 | |
J2 | PCI_AD17 | BC_PCI_AD17 | Connected to South Bridge CXD2973GB pad AV27 | |
J3 | PCI_AD6 | BC_PCI_AD6 | Connected to South Bridge CXD2973GB pad AW21 | |
J4 | VDDC | +1.5V_BRIDGE | Connected to Mitsumi MM1591FFBEG (IC6021) pin 1 | |
J5 | VDDS | +3.3V_BRIDGE | Connected to Mitsumi MM1593DFBEG (IC6022) pin 1 | |
J6 | VSS | GND | Ground | |
J7 | VDDS | +3.3V_BRIDGE | Connected to Mitsumi MM1593DFBEG (IC6022) pin 1 | |
J8 | VSS | GND | Ground | |
J9 | VSS | GND | Ground | |
J10 | VSS2 | GND | Ground | |
J11 | VDDC | +1.5V_BRIDGE | Connected to Mitsumi MM1591FFBEG (IC6021) pin 1 | |
J12 | GPIO33_0 | CL7310 | Testpad | |
J13 | SIF_AD19 | SIF_BC_AD19 | Connected to EEGS CXD2953AGB pad B13 | |
J14 | SIF_AD27 | SIF_BC_AD27 | Connected to EEGS CXD2953AGB pad C10 | |
K1 | PCI_AD9 | BC_PCI_AD9 | Connected to South Bridge CXD2973GB pad AT21 | |
K2 | PCI_AD11 | BC_PCI_AD11 | Connected to South Bridge CXD2973GB pad AT22 | |
K3 | PCI_AD10 | BC_PCI_AD10 | Connected to South Bridge CXD2973GB pad AU22 | |
K4 | VSS | GND | Ground | |
K5 | VDDC | +1.5V_BRIDGE | Connected to Mitsumi MM1591FFBEG (IC6021) pin 1 | |
K6 | VDDS | +3.3V_BRIDGE | Connected to Mitsumi MM1593DFBEG (IC6022) pin 1 | |
K7 | VDDS | +3.3V_BRIDGE | Connected to Mitsumi MM1593DFBEG (IC6022) pin 1 | |
K8 | TEST_PLL_BP_1 | GND | Ground | |
K9 | VSS | GND | Ground | |
K10 | VDD | +1.5V_EEGS_VDDO | Connected to Mitsumi MM1561FFBE (IC6606) pin 1 | |
K11 | VSS | GND | Ground | |
K12 | GPIO33_1 | CL7304 | Testpad | |
K13 | SIF_AD17 | SIF_BC_AD17 | Connected to EEGS CXD2953AGB pad A13 | |
K14 | SIF_BREQ | BREQ_BC | Connected to EEGS CXD2953AGB pad A7 | |
L1 | PCI_AD3 | BC_PCI_AD3 | Connected to South Bridge CXD2973GB pad AT19 | |
L2 | PCI_AD7 | BC_PCI_AD7 | Connected to South Bridge CXD2973GB pad AV21 | |
L3 | PCI_AD13 | BC_PCI_AD13 | Connected to South Bridge CXD2973GB pad AV23 | |
L4 | VDDC | +1.5V_BRIDGE | Connected to Mitsumi MM1591FFBEG (IC6021) pin 1 | |
L5 | VSS2 | GND | Ground | |
L6 | VSS | GND | Ground | |
L7 | VSS2 | GND | Ground | |
L8 | VSS | GND | Ground | |
L9 | VDDS | +3.3V_BRIDGE | Connected to Mitsumi MM1593DFBEG (IC6022) pin 1 | |
L10 | VDDS | +3.3V_BRIDGE | Connected to Mitsumi MM1593DFBEG (IC6022) pin 1 | |
L11 | VSS | GND | Ground | |
L12 | GPIO33_2 | CL7309 | Testpad | |
L13 | SIF_BGNT | BGNT_BC | Connected to EEGS CXD2953AGB pad B7 | |
L14 | SIF_GINT | SGINT_BC | Connected to EEGS CXD2953AGB pad B6 | |
M1 | PCI_AD4 | BC_PCI_AD4 | Connected to South Bridge CXD2973GB pad AU20 | |
M2 | PCI_AD2 | BC_PCI_AD2 | Connected to South Bridge CXD2973GB pad AU19 | |
M3 | PCI_AD1 | BC_PCI_AD1 | Connected to South Bridge CXD2973GB pad AV19 | |
M4 | VSS2 | GND | Ground | |
M5 | PCI_STOP | BC_PCI_STOP | Connected to South Bridge CXD2973GB pad AV25 | |
M6 | PCI_PAR | BC_PCI_PAR | Connected to South Bridge CXD2973GB pad AU24 | |
M7 | PCI_TRDY | BC_PCI_TRDY | Connected to South Bridge CXD2973GB pad AT25 | |
M8 | PCI_CBE0 | BC_PCI_CBE0 | Connected to South Bridge CXD2973GB pad AP19 | |
M9 | PCI_FRAME | BC_PCI_FRAME | Connected to South Bridge CXD2973GB pad AT26 | |
M10 | PCI_RST | BC_PCI_RST | Connected to South Bridge CXD2973GB pad AP29 through a 22 ohm resistor | |
M11 | SW1.5 | SW1.5 | Connected to Mitsumi MM1561FFBE (IC6606) pin 5 (switches +1.5V_EEGS_VDDO) | |
M12 | GPIO33_3 | CL7303 | Testpad | |
M13 | VBLK | EEGS_VBLK1 | Connected to EEGS CXD2953AGB pad A4 (Vertical BLanK) | |
M14 | HBLK | EEGS_HBLK1 | Connected to EEGS CXD2953AGB pad B5 (Horizontal BLanK) | |
N1 | PCI_AD8 | BC_PCI_AD8 | Connected to South Bridge CXD2973GB pad AU21 | |
N2 | PCI_AD5 | BC_PCI_AD5 | Connected to South Bridge CXD2973GB pad AT20 | |
N3 | PLLAVD0 | +1.5V_BRIDGE | Connected to Mitsumi MM1591FFBEG (IC6021) pin 1 | |
N4 | PCI_AD0 | BC_PCI_AD0 | Connected to South Bridge CXD2973GB pad AW19 | |
N5 | PCI_SERR | BC_PCI_SERR | Connected to South Bridge CXD2973GB pad AT24 (system error) | |
N6 | PCI_DEVSEL | BC_PCI_DEVSEL | Connected to South Bridge CXD2973GB pad AU25 | |
N7 | PCI_CBE2 | BC_PCI_CBE2 | Connected to South Bridge CXD2973GB pad AP20 | |
N8 | PCI_GNT | BC_PCI_GNT1 | Connected to South Bridge CXD2973GB pad AN24 | |
N9 | SW2.65 | SW2.65 | Connected to Mitsumi MM1662YHBE (IC6607) pin 5 (switches +2.5V_RDRAM_VDD) | |
N10 | SW3.3 | SW3.3 | Connected to Mitsumi MM1573ENRE (IC6605) pin 3 (switches +3.3V_DRCG_VDD) | |
N11 | SW1.81 | SW1.81 | Connected to Mitsumi MM1561JFBE (IC6603) pin 5 (switches +1.8V_EEGS_VDDIO) | |
N12 | GPIO33_4 | CL7308 | Testpad | |
N13 | PCLKEN | PCLKEN | Connected to base pin of DTC144EUA-T106 transistor (Q2101) to switch TC7WP3125FK (IC2105) and generate the clock DRCG_GEN18M DRCG_GEN18M is a input of the Renesas ICS626BGLFT (IC7001) that generates the clocks for the communications in between EEGS and the RDRAM chips (CTMA/CTMNA and CTMB/CTMNB) | |
N14 | EGRST | EGRST | Connected to EEGS CXD2953AGB pad B4 (control line to reset EEGS) | |
P1 | PCI_AD12 | BC_PCI_AD12 | Connected to South Bridge CXD2973GB pad AW23 | |
P2 | PLLAVS0 | GND | Ground | |
P3 | PCI_CLK | BC_PCI_CLK | Connected to ICS1493G-18LFT (IC5001) pin 5 Connected to South Bridge CXD2973GB pad AP28 through a 49.9 ohm resistor | |
P4 | PCI_CBE1 | BC_PCI_CBE1 | Connected to South Bridge CXD2973GB pad AN19 | |
P5 | PCI_PERR | BC_PCI_PERR | Connected to South Bridge CXD2973GB pad AW25 (parity error) | |
P6 | PCI_IRDY | BC_PCI_IRDY | Connected to South Bridge CXD2973GB pad AU26 | |
P7 | PCI_CBE3 | BC_PCI_CBE3 | Connected to South Bridge CXD2973GB pad AN20 | |
P8 | PCI_REQ | BC_PCI_REQ1 | Connected to South Bridge CXD2973GB pad AN22 | |
P9 | SW1.8 | SW1.8 | Connected to a missing component (IC6604) pin 3 (switches +1.8V_RDRAM_VCMOS) | |
P10 | SW2.5 | SW2.5 | Connected to OnSemi NCP511SN25T1G (IC6601) pin 3 (switches +2.5V_EEGS_PLLVDD1) | |
P11 | SW1.2 | SW1.2 | Connected to Rohm BD3504FVM-TR (IC6602) pin 3 (switches +1.2V_EEGS_VDD) | |
P12 | SW3.1 | SW3.1 | Connected to Mitsumi MM3143BNRE (IC6600) pin 3 (switches +3.1V_EEGS_AVDA) | |
P13 | GPIO33_7 | CL7301 | Testpad | |
P14 | PWRUP_EE | PWRUP_EE | Connected to EEGS CXD2953AGB pad Y1 (control line to power EEGS) |
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