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**[[D5305A]]{{dot}}[[D5305B]]{{dot}}[[D5305C]]{{dot}}[[D5305F]]{{dot}}[[D5305K]]{{dot}}[[D5305L]]
**[[D5305A]]{{dot}}[[D5305B]]{{dot}}[[D5305C]]{{dot}}[[D5305F]]{{dot}}[[D5305K]]{{dot}}[[D5305L]]


== RSX series missing ==
== Alternative List ==
In the transistion from RSX 40nm to 28nm sony removed the prefix "CX" and reduced the suffix "xxxx" (4 optional characters in chronological order: GB -> AGB -> BGB -> CGB, etc...) to "x" (only 1 character, in chronological order: A, B, C, etc...) in the name<br>
* [[CECHAxx]]/[[COK-00x#COK-001|COK-001]], [[CECHBxx]]/[[COK-00x#COK-001|COK-001]], [[CECHCxx]]/[[COK-00x#COK-002|COK-002]], [[CECHExx]]/[[COK-00x#COK-002W|COK-002W]] and [[CECHHxx]]/[[DIA-00x#DIA-001|DIA-001]] : [[CXD2971AGB]] (RSX 90nm)
It seems the real reason why sony shorted the name this way is because in the 28nm DIE there is not enought room to etch the complete name, compare the different styles and font sizes in between [[Media:RSX_CXD5302DGB_with_HYNIX_H5RS5223DFR_in_CECH-4001B_MSX-001.jpg|40nm]] with [[Media:RSX_D5305L_with_elpida_W1132BBBG_in_CECH-43xx_REX-001.jpg|28nm]]<br>
* [[CECHGxx]]/[[SEM-00x|SEM-001]] : [[CXD2971DGB]] (RSX 90nm)
So we can consider the '''D5305x''' used in the latest superslims is a '''CXD5305xxxx''' and is following the same numerical sequence than the previous RSX series, the list we have is:
* [[CECHJxx]]/[[DIA-00x#DIA-002|DIA-002]] and [[CECHKxx]]/[[DIA-00x#DIA-002|DIA-002]] : [[CXD2982]] (RSX 65nm)
*CXD'''2971'''xxxx
* [[CECHLxx]]/[[VER-00x|VER-001]] up to including [[CECHQxx]]/[[VER-00x|VER-001]] : [[CXD2991BGB]] (RSX 65nm)
*CXD'''2982'''xxxx
* [[CECH-20xx]]/[[DYN-00x|DYN-001]] : [[CXD2991GGB]] (RSX 65nm)
*CXD'''2991'''xxxx
* <strike>[[CECHAxx]]/[[COK-00x#COK-001|COK-001]] : [[CXD5300DGB]] (RSX 40nm)</strike> <--- this is a official refurbised with a new RSX and a new syscon [[CXR714120-304GB]]
*CXD'''5300'''xxxx
* [[CECH-21xx]]/[[SUR-00x|SUR-001]] : [[CXD5300AGB]] (RSX 40nm)
*CXD'''5301'''xxxx
* [[CECH-25xx]]/[[JTP-00x|JTP-001]] and [[CECH-25xx]]/[[JSD-00x|JSD-001]]: [[CXD5300A1GB]] (RSX 40nm)
*CXD'''5302'''xxxx
* [[CECH-30xx]]/[[KTE-00x|KTE-001]] : [[CXD5301DGB]] (RSX 40nm)
*<span style="color:#bbb">CX</span>D'''5305'''x<span style="color:#bbb">xxx</span>


But this sequence indicates there is a mistery, because there are 2 series missing (5301 -> 5302 -> '''5303''' -> '''5304''' -> 5305), either is like this:
{| class="wikitable" style="text-align:center; font-size:0.8em"
*CXD'''2971'''xxxx
|+ RSX revisions by series (superslim PS3 models and motherboards are doubtful)
*CXD'''2982'''xxxx
! rowspan="2" | [[SKU_Models|PS3 Model]] !! rowspan="2" | [[Motherboard_Revisions|Motherboard]] !! rowspan="2" | [[Product Sub Code|Product<br>Sub Code]] !! colspan="5" | RSX
*CXD'''2991'''xxxx
|-
*CXD'''5300'''xxxx
! Series || Node || Size || VRAM || IHS
*CXD'''5301'''xxxx
|-
*CXD'''5302'''xxxx
! [[CECHAxx]] || rowspan="2" | [[COK-00x#COK-001|COK-001]]
*CXD'''5303'''xxxx <--- undocumented / prototype ('''41x41''' pad layout, 4*64MB VRAM)
| 0x0001 || rowspan="6" | [[CXD2971xxx]] || rowspan="6" | 90nm || rowspan="6" | 258mm² || rowspan="6" | 4*64MB || rowspan="6" {{yes}}
*CXD'''5304'''xxxx <--- undocumented / prototype ('''41x41''' pad layout, 4*64MB VRAM)
|-
*<span style="color:#bbb">CX</span>D'''5305'''x<span style="color:#bbb">xxx</span>
! [[CECHBxx]]
 
| 0x0002
Or like this
|-
*CXD'''2971'''xxxx
! [[CECHCxx]] || rowspan="2" | [[COK-00x#COK-002|COK-002]]
*CXD'''2982'''xxxx
| 0x0003
*CXD'''2991'''xxxx
|-
*CXD'''5300'''xxxx
! [[CECHExx]]
*CXD'''5301'''xxxx
| 0x0004
*CXD'''5302'''xxxx
|-
*<span style="color:#bbb">CX</span>D'''5303'''x<span style="color:#bbb">xxx</span> <--- undocumented / prototype ('''34x34''' pad layout, 2*128MB VRAM)
! [[CECHGxx]] || [[SEM-00x|SEM-001]]
*<span style="color:#bbb">CX</span>D'''5304'''x<span style="color:#bbb">xxx</span> <--- undocumented / prototype ('''34x34''' pad layout, 2*128MB VRAM)
| 0x0005
*<span style="color:#bbb">CX</span>D'''5305'''x<span style="color:#bbb">xxx</span>
|-
! [[CECHHxx]] || [[DIA-00x#DIA-001|DIA-001]]
| 0x0006
|-
! [[CECHJxx]] || rowspan="2" | [[DIA-00x#DIA-002|DIA-002]]
| rowspan="2" | 0x0007 || rowspan="2" | [[CXD2982xxx]] || rowspan="2" | 65nm || rowspan="2" | 186mm² || rowspan="2" | 4*64MB || rowspan="2" {{yes}}
|-
! [[CECHKxx]]
|-
! [[CECHLxx]] || rowspan="4" | [[VER-00x|VER-001]]
| rowspan="4" | 0x0008 || rowspan="5" | [[CXD2991xxx]] || rowspan="5" | 65nm || rowspan="5" | 186mm² || rowspan="5" | 4*64MB || rowspan="5" {{yes}}
|-
! [[CECHMxx]]
|-
! [[CECHPxx]]
|-
! [[CECHQxx]]
|-
! [[CECH-20xx]]A/B || [[DYN-00x|DYN-001]]
| 0x0009
|-
! [[CECH-21xx]]A/B || [[SUR-00x|SUR-001]]
| 0x000A || rowspan="3" | [[CXD5300xxx]] || rowspan="3" | 40nm || rowspan="3" | 114mm² || rowspan="3" | 4*64MB || rowspan="3" {{yes}}
|-
! rowspan="2" | [[CECH-25xx]]A/B || [[JTP-00x|JTP-001]]
| rowspan="2" | 0x000B
|-
! [[JSD-00x|JSD-001]]
|-
! [[CECH-30xx]]A/B || [[KTE-00x|KTE-001]]
| 0x000C || [[CXD5301xxx]] || 40nm || 114mm² || 4*64MB || {{yes}}
|-
! [[CECH-40xx]]B/C v1 || ?
| 0x000D || rowspan="2" | [[CXD5302xxx]] || rowspan="2" | 40nm || rowspan="2" | 114mm² || rowspan="2" | 4*64MB || rowspan="2" {{no}}
|-
! [[CECH-40xx]]A v1 || ?
| 0x000E
|-
! [[CECH-40xx]]B/C v2 || ?
| 0x000F || rowspan="6" | [[D5305x]] || rowspan="6" | 28nm || rowspan="6" | 68mm² || rowspan="6" | 2*128MB || rowspan="6" {{no}}
|-
! [[CECH-40xx]]A v2 || ?
| 0x0010
|-
! [[CECH-42xx]]B/C || ?
| 0x0011
|-
! [[CECH-42xx]]A || ?
| 0x0012
|-
! [[CECH-43xx]]B/C || ?
| 0x0013
|-
! [[CECH-43xx]]A || ?
| 0x0014
|-
|}
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